SEARCH
— IC芯片 | 连接器 | 传感器 | 被动器件 —
The Infineon Technologies 1EDI20N12AFXUMA1 is a high-speed, single-channel isolated gate driver from the EiceDRIVER family. It features magnetic coupling technology for galvanic isolation and supports a voltage rating of 1200 V. The device provides separate source and sink output currents of 3.5 A and 4 A respectively, enabling efficient switching of power devices. Operating within a supply voltage range of 3.1 V to 17 V, it delivers propagation delays as low as 120 ns and rise/fall times of approximately 10 ns and 9 ns. Packaged in an 8-SOIC (PG-DSO-8-51) surface-mount format, it operates across a temperature range of -40°C to +150°C.
Verify the complete ordering part number including suffixes such as UMA1 to ensure correct tape-and-reel packaging specifications. Confirm that the specific variant matches the required isolation voltage and package dimensions for your PCB layout. Cross-reference the manufacturer datasheet for humidity sensitivity handling requirements during assembly processes.
Select this component when high-speed switching performance and reliable galvanic isolation are critical for power electronics applications. The separate output configuration allows optimized drive strength for different power devices. Ensure the input logic levels and supply voltage ranges align with the controlling microcontroller or DSP interface.
This device belongs to the 1ED Compact series of EiceDRIVER gate drivers, designed for industrial and automotive power applications. It replaces older optocoupler-based solutions by offering higher speed and better reliability through magnetic coupling technology. The part is commonly used in medium-power inverters and DC-DC converters.
Public confirmed substitute part numbers include 1EDI20H12AH for similar high-side isolation requirements. Verify pin compatibility and electrical parameters before substitution.
It uses magnetic coupling technology for galvanic isolation, providing high common-mode transient immunity.
Yes, the device supports both inverting and non-inverting logic configurations.