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74ACQ373SJX is listed in the Latches range at ChipApex. The manufacturer field lists onsemi. Its product description is IC D-TYPE TRANSP SGL 8:8 20SOP. Review the specifications below when checking this part for your BOM.
The onsemi 74ACQ373SJX is an octal transparent latch with 3-STATE outputs, utilizing Fairchild Quiet Series technology for superior dynamic threshold performance and guaranteed simultaneous switching noise levels. It features GTO output control and a split ground bus to minimize noise. The device operates within a supply voltage range of 2.0V to 6.0V (AC) or 4.5V to 5.5V (ACT), supporting output drive currents of 24mA. It is housed in a 20-Lead Small Outline Package (SOP) with a width of 5.3mm.
Verify the specific ordering code suffix against manufacturer documentation to confirm package type and tape/reel configuration. Ensure compatibility with the required supply voltage range (AC vs ACT) and operating temperature specifications before integration into the design.
Select this component when low simultaneous switching noise and high dynamic threshold performance are critical requirements. It serves as a direct functional replacement for standard AC/ACT373 devices where enhanced noise immunity and guaranteed pin-to-pin skew are necessary for reliable data transmission.
This part belongs to the 74ACQ/ACTQ373 Quiet Series family, designed by Fairchild Semiconductor. It is an octal transparent latch variant that incorporates advanced noise reduction techniques compared to standard logic families, specifically targeting high-speed digital systems requiring stable signal integrity.
Direct substitutes include other 74ACQ373 variants from Fairchild or equivalent octal latches from other manufacturers. Verify pinout compatibility and electrical characteristics such as propagation delay and output drive strength when cross-referencing with alternative sources.
When LE is HIGH, the latches are transparent to data inputs. When LE transitions from HIGH to LOW, the data present at the setup time preceding the transition is latched.
When OE is LOW, the outputs are in the 2-state mode. When OE is HIGH, the outputs enter a high impedance state, isolating them from the bus without affecting the stored data.
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