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Product Detailed Parameters
- Description:IC INVERTER 1CH 1-INP 5TSSOP
- Series:74AUP
- Mfr:Nexperia USA Inc.
- Package:Tape & Reel (TR),Cut Tape (CT)
- Logic Type:Inverter
- Number of Circuits:1
- Number of Inputs:1
- Features:-
- Voltage - Supply:0.8V ~ 3.6V
- Current - Quiescent (Max):500 nA
- Current - Output High, Low:4mA, 4mA
- Input Logic Level - Low:0.7V ~ 0.9V
- Input Logic Level - High:1.6V ~ 2V
- Max Propagation Delay @ V, Max CL:5.4ns @ 3.3V, 30pF
- Operating Temperature:-40°C ~ 125°C
- Mounting Type:Surface Mount
- Supplier Device Package:5-TSSOP
- Package / Case:5-TSSOP, SC-70-5, SOT-353
- Grade:-
- Qualification:-
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Overview
The Nexperia 74AUP1G04GW,125 is a single inverter housed in a TSSOP5 (SOT353-1) package. It operates within a supply voltage range of 0.8 V to 3.6 V and supports ambient temperatures from -40 °C to +125 °C. The device features Schmitt-trigger inputs for noise immunity and includes IOFF circuitry for partial power-down applications. Static supply current is limited to 0.9 μA maximum at extended temperature ranges. Propagation delay typically ranges from 2.1 ns to 16.0 ns depending on voltage and load capacitance.
Feature Summary
- Schmitt-trigger action ensures tolerance to slow input transitions across the full operating voltage range.
- Integrated IOFF circuitry disables outputs during power-down to prevent damaging backflow currents.
- CMOS construction provides low static and dynamic power consumption throughout the voltage spectrum.
- High noise immunity with low overshoot and undershoot characteristics relative to the supply voltage.
Applications
- Partial power-down mode systems requiring isolation of powered-down sections
- Signal inversion in low-voltage digital logic circuits
- Noise filtering applications utilizing Schmitt-trigger input characteristics
Procurement Notes
Verify the ordering suffix '125' against official Nexperia documentation to confirm specific tape-and-reel packaging or variant details. Ensure the TSSOP5 package designation matches system board space constraints. Confirm that the specified temperature range meets environmental requirements. Cross-reference the datasheet revision date to ensure compliance with current JEDEC standards for ESD and latch-up performance.
Selection Notes
Select this component when a single inverter function is required with Schmitt-trigger input capabilities. The TSSOP5 package offers a compact footprint suitable for space-constrained designs. Consider the wide supply voltage compatibility if interfacing between different logic levels. Evaluate the low power dissipation benefits for battery-operated or energy-efficient applications.
Part Context
This device belongs to the 74AUP1Gxx series of single-gate logic ICs manufactured by Nexperia. The AUP series is characterized by ultra-low power consumption while maintaining high speed. The 74AUP1G04 specifically provides one inverting gate. Other variants in this family include buffers, non-inverters, and NAND gates, all sharing similar electrical characteristics and package options.
Replacement Considerations
Compatible substitutes include other single inverters from the 74AUP1Gxx series such as the 74AUP1G04GV or 74AUP1G04GM, provided they match the required package type and electrical specifications. Verify pinout compatibility and thermal performance before substitution.
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