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The Nexperia 74AUP1G0832GN,132 is a low-power 3-input AND-OR gate in the 74AUP series. It operates on a supply voltage range of 0.8 V to 3.6 V and features Schmitt-trigger inputs for noise immunity. The device includes IOFF circuitry for partial power-down mode operation. It is housed in a 6-XSON (SOT1115) package with dimensions of 0.9 x 1.0 x 0.35 mm. Static supply current is limited to 0.9 μA maximum at 25 °C. Propagation delay ranges from 1.2 ns to 7.0 ns depending on load capacitance and voltage.
Verify the specific ordering suffix GN corresponds to the SOT1115 XSON6 package variant. Confirm RoHS3 compliance status as per the latest manufacturer documentation. Ensure the component matches the required temperature range specifications for the intended operational environment before finalizing procurement orders.
Select this component when a single 3-input AND-OR function is required within a minimal footprint. The 74AUP series offers lower power consumption compared to older logic families. Verify that the input voltage levels align with the Schmitt-trigger thresholds defined in the static characteristics table for the target supply voltage.
This part belongs to the Nexperia 74AUP family of ultra-low-power CMOS logic devices. The 74AUP1G0832 specifically implements a 3-input AND-OR gate configuration. It is designed for portable and battery-operated applications due to its extended supply voltage range and minimal static power dissipation characteristics.
Direct pin-compatible replacements include other packages of the same logic function such as 74AUP1G0832GM or 74AUP1G0832GS. Cross-family alternatives may require logic level verification and pinout mapping adjustments.