74AUP1G332GW,125

74AUP1G332GW,125

$0.38
  • Description:IC GATE OR 1CH 3-INP 6TSSOP
  • Series:74AUP
  • Mfr:Nexperia USA Inc.
  • Package:Tape & Reel (TR),Cut Tape (CT)

SKU:20fc9280fb59 Category: Brand:

  
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Product Detailed Parameters

  • Description:IC GATE OR 1CH 3-INP 6TSSOP
  • Series:74AUP
  • Mfr:Nexperia USA Inc.
  • Package:Tape & Reel (TR),Cut Tape (CT)
  • Logic Type:OR Gate
  • Number of Circuits:1
  • Number of Inputs:3
  • Features:-
  • Voltage - Supply:0.8V ~ 3.6V
  • Current - Quiescent (Max):500 nA
  • Current - Output High, Low:4mA, 4mA
  • Input Logic Level - Low:0.7V ~ 0.9V
  • Input Logic Level - High:1.6V ~ 2V
  • Max Propagation Delay @ V, Max CL:5.5ns @ 3.3V, 30pF
  • Operating Temperature:-40°C ~ 125°C
  • Mounting Type:Surface Mount
  • Supplier Device Package:6-TSSOP
  • Package / Case:6-TSSOP, SC-88, SOT-363
  • Grade:-
  • Qualification:-

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74AUP1G332GW,125

Overview

The Nexperia 74AUP1G332GW,125 is a single 3-input OR gate in the AUP logic series. It operates within a supply voltage range of 0.8 V to 3.6 V and supports an ambient temperature range from -40 °C to +125 °C. The device features Schmitt-trigger inputs for noise immunity and includes IOFF circuitry for partial power-down applications. Propagation delay ranges from 1.1 ns to 3.9 ns depending on load capacitance and voltage. Static supply current is limited to 0.9 μA at maximum operating temperatures.

Feature Summary

  • Schmitt-trigger action provides tolerance for slow input rise and fall times across the entire supply voltage range.
  • IOFF circuitry disables outputs during power-down to prevent damaging backflow currents.
  • Inputs are overvoltage tolerant up to 3.6 V, allowing interfacing with different logic levels.

Applications

  • Partial power-down mode operation
  • Signal routing in low-voltage digital systems
  • Noise-immune logic processing

Procurement Notes

Verify the specific ordering suffix matches the required package type and temperature grade. Confirm that the component meets JEDEC standards relevant to the target voltage domain. Ensure design safeguards account for absolute maximum ratings to prevent permanent damage.

Selection Notes

Select this component when a single 3-input OR function is required in ultra-low-power designs. The AUP series offers high noise immunity and wide voltage compatibility. Verify that the TSSOP6 package dimensions fit the available PCB footprint constraints.

Part Context

This part belongs to the Nexperia 74AUP family of low-power CMOS logic devices. The 74AUP1G332 specifically implements a 3-input OR gate configuration. It is designed for portable and battery-operated applications requiring minimal static power consumption while maintaining fast switching speeds.

Replacement Considerations

Direct substitutes include other 74AUP1G332 variants with different packages such as GM, GN, or GS. Cross-family replacements like LVC or HC series require voltage level verification due to differing supply ranges and input thresholds.

FAQ

Does the 74AUP1G332 support partial power-down?

Yes, the device includes IOFF circuitry that disables the output to prevent backflow current when powered down.

What is the input voltage tolerance?

The inputs are overvoltage tolerant up to 3.6 V, regardless of the supply voltage state.

74AUP1G332GW,12574AUP1G332GW,125
$0.38
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