74AUP1G386GM,132

Overview

The Nexperia 74AUP1G386GM,132 is a single 3-input EXCLUSIVE-OR gate in the 74AUP series. It operates within a supply voltage range of 0.8 V to 3.6 V and features Schmitt-trigger inputs for noise tolerance. The device utilizes IOFF circuitry to prevent backflow current during partial power-down states. Static supply current (ICC) is limited to 0.9 μA maximum at 25 °C and 1.4 μA at -40 °C to +125 °C. Propagation delay ranges from 1.0 ns to 6.9 ns depending on load capacitance and voltage. It is housed in a 6-XSON (SOT886) package.

Feature Summary

• Schmitt-trigger action at all inputs provides tolerance for slower input rise and fall times.
• IOFF circuitry enables partial power-down mode by disabling outputs to prevent damaging backflow currents.
• CMOS low power dissipation ensures very low static and dynamic power consumption across the entire supply voltage range.

Applications

• Partial power-down applications requiring protection against backflow current
• Logic circuits requiring noise immunity with slow input transitions
• Low-power digital signal processing systems

Procurement Notes

Verify the specific ordering suffix matches the required package type, as the 74AUP1G386 family includes multiple variants such as TSSOP6 and other XSON packages. Confirm that the GM designation corresponds to the SOT886 (XSON6) package with the specified body dimensions. Ensure compatibility with the target application's voltage levels and temperature requirements before finalizing procurement.

Selection Notes

Select this component when a single 3-input XOR function is required with low power consumption and high noise immunity. The wide supply voltage range supports operation from 0.8 V to 3.6 V. Consider the IOFF feature if the system requires partial power-down capabilities to minimize leakage currents. Verify that the propagation delay specifications meet the timing constraints of the intended digital logic design.

Part Context

This component belongs to the 74AUP series of advanced ultra-low power CMOS logic devices. The series is designed for portable and battery-operated applications due to its low static power consumption. The 74AUP1G386 specifically implements a 3-input exclusive-OR logic function within a compact surface-mount package suitable for space-constrained designs.

Replacement Considerations

Public confirmed substitute part numbers are not available in the provided source material.

FAQ

How does the IOFF circuitry function in the 74AUP1G386?

The IOFF circuitry disables the output when the device is powered down, preventing potentially damaging backflow current through the device.

What is the purpose of the Schmitt-trigger inputs?

The Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.