74AUP1G79GW,125

74AUP1G79GW,125

$0.19
  • Description:IC FF D-TYPE SNGL 1BIT 5TSSOP
  • Series:74AUP
  • Mfr:Nexperia USA Inc.
  • Package:Tape & Reel (TR),Cut Tape (CT)

SKU:c034ae21a965 Category: Brand:

  
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Product Detailed Parameters

  • Description:IC FF D-TYPE SNGL 1BIT 5TSSOP
  • Series:74AUP
  • Mfr:Nexperia USA Inc.
  • Package:Tape & Reel (TR),Cut Tape (CT)
  • Function:Standard
  • Type:D-Type
  • Output Type:Non-Inverted
  • Number of Elements:1
  • Number of Bits per Element:1
  • Clock Frequency:309 MHz
  • Max Propagation Delay @ V, Max CL:5.8ns @ 3.3V, 50pF
  • Trigger Type:Positive Edge
  • Current - Output High, Low:4mA, 4mA
  • Voltage - Supply:0.8V ~ 3.6V
  • Current - Quiescent (Iq):500 nA
  • Operating Temperature:-40°C ~ 125°C (TA)
  • Mounting Type:Surface Mount
  • Supplier Device Package:5-TSSOP
  • Package / Case:5-TSSOP, SC-70-5, SOT-353
  • Input Capacitance:0.8 pF
  • Grade:-
  • Qualification:-

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74AUP1G79GW,125

Overview

The Nexperia 74AUP1G79GW,125 is a single D-type flip-flop in the 74AUP logic series. It operates on a supply voltage of 0.8 V to 3.6 V with a maximum clock frequency of 200 MHz. The device features a propagation delay of 17.3 ns at 3.3 V and offers output currents of ±4 mA. It includes Schmitt-trigger inputs for noise tolerance and IOFF circuitry for partial power-down protection. The component is housed in a TSSOP-5 package and supports an operating temperature range from -40°C to +125°C.

Feature Summary

  • Single D-type edge-triggered flip-flop with non-inverting output
  • IOFF circuitry prevents backflow current during partial power-down
  • Schmitt-trigger inputs ensure tolerance for slow rise and fall times
  • Complies with JEDEC standards for various low-voltage ranges

Applications

  • Data storage and register applications
  • Timing and synchronization circuits
  • Parallel-to-serial data conversion
  • State machine implementations

Procurement Notes

Verify the specific suffix '125' indicates the standard tape and reel packaging configuration. Confirm that the AEC-Q100 qualification status applies only to the '-Q100' variant, as this standard commercial part may not hold automotive certification. Ensure input voltage levels match the specified JEDEC compliance ranges for the target supply voltage.

Selection Notes

Select this component for low-power applications requiring operation down to 0.8 V. The wide supply range and Schmitt-trigger inputs make it suitable for noisy environments or signals with slow transitions. Consider the TSSOP-5 package size for space-constrained designs where a single bit of storage is sufficient.

Part Context

This part belongs to the 74AUP family, which provides ultra-low power consumption compared to older CMOS technologies. The 74AUP1G79 specifically implements a D-flip-flop function, distinct from buffers or inverters in the same series. It is designed for general-purpose digital logic applications requiring reliable data retention at low voltages.

Replacement Considerations

The 74AHCT1G79GW,125 serves as a parameter-equivalent alternative within the Nexperia portfolio, though it requires a higher 4.5 V to 5.5 V supply voltage.

74AUP1G79GW,12574AUP1G79GW,125
$0.19
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