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Product Detailed Parameters
- Description:IC INVERTER 1CH 1-INP 5TSSOP
- Series:74AUP
- Mfr:Nexperia USA Inc.
- Package:Tape & Reel (TR),Cut Tape (CT)
- Logic Type:Inverter
- Number of Circuits:1
- Number of Inputs:1
- Features:-
- Voltage - Supply:0.8V ~ 3.6V
- Current - Quiescent (Max):500 nA
- Current - Output High, Low:4mA, 4mA
- Input Logic Level - Low:-
- Input Logic Level - High:-
- Max Propagation Delay @ V, Max CL:4.3ns @ 3.3V, 30pF
- Operating Temperature:-40°C ~ 125°C
- Mounting Type:Surface Mount
- Supplier Device Package:5-TSSOP
- Package / Case:5-TSSOP, SC-70-5, SOT-353
- Grade:-
- Qualification:-
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Overview
The Nexperia 74AUP1GU04GW,125 is a single unbuffered inverter housed in a TSSOP5 (SOT353-1) package. It operates within a supply voltage range of 0.8 V to 3.6 V and supports an ambient temperature range from -40 °C to +125 °C. The device features low static power consumption with a maximum ICC of 0.9 μA at extended temperatures. Propagation delay ranges from 0.3 ns to 5.7 ns depending on load capacitance and voltage. Input leakage current is specified at ±0.75 μA maximum under full temperature conditions.
Feature Summary
- Provides partial power-down mode operation through integrated IOFF circuitry.
- Ensures high noise immunity with overvoltage tolerant inputs up to the supply voltage level.
- Delivers very low dynamic and static power consumption across the entire operating voltage range.
- Offers robust electrostatic discharge protection exceeding standard JEDEC Class 3A and C3 ratings.
Applications
- Linear amplifier circuits
- Crystal oscillator configurations
Procurement Notes
Verify the specific suffix 'GW' corresponds to the TSSOP5 plastic thin shrink small outline package with a body width of 1.25 mm. Confirm that the required temperature grade matches the -40 °C to +125 °C specification listed for this variant. Ensure input and output current limits are respected to prevent exceeding absolute maximum ratings during design integration.
Selection Notes
Select this component when a single inverting function is required in a minimal footprint surface-mount configuration. The wide supply voltage compatibility allows direct interfacing with various logic families operating between 0.8 V and 3.6 V. Consider the low propagation delay characteristics for high-speed signal inversion applications where power efficiency is a primary constraint.
Part Context
This device belongs to the 74AUP1Gxx series of ultra-low-power CMOS logic gates manufactured by Nexperia. The AUP family is designed for applications requiring reduced power dissipation while maintaining high-speed performance. The GW suffix specifically denotes the TSSOP5 package option within this broader portfolio of single-gate logic solutions.
Replacement Considerations
Consult official Nexperia documentation for verified substitute part numbers. Cross-referencing should prioritize devices with identical logical functions, compatible supply voltage ranges, and matching package dimensions to ensure mechanical and electrical interchangeability without redesign.
FAQ
Does the 74AUP1GU04GW support partial power-down mode?
Yes, the device includes IOFF circuitry that enables partial power-down mode operation to minimize current consumption when the system is not active.
What is the maximum input voltage tolerance?
The inputs are overvoltage tolerant up to 3.6 V, allowing them to handle signals higher than the supply voltage without damage, provided current limits are observed.
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