74AUP1T00GX,125

$0.09

Description：IC GATE NAND 2-INP
Series：*
Mfr：Nexperia USA Inc.
Package：Bulk

SKU:9d261f4459bf Category: Gates and Inverters Brand: Nexperia USA Inc.

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Product introduction

Product Detailed Parameters

Description：IC GATE NAND 2-INP
Series：*
Mfr：Nexperia USA Inc.
Package：Bulk
Logic Type：-
Number of Circuits：-
Number of Inputs：-
Features：-
Voltage - Supply：-
Current - Quiescent (Max)：-
Current - Output High, Low：-
Input Logic Level - Low：-
Input Logic Level - High：-
Max Propagation Delay @ V, Max CL：-
Operating Temperature：-
Mounting Type：-
Supplier Device Package：-
Package / Case：-
Grade：-
Qualification：-

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74AUP1T00GX,125

Overview

The Nexperia 74AUP1T00GX,125 is a low-power 2-input NAND gate with voltage-level translator in an X2SON5 package. It operates from a supply voltage of 2.3 V to 3.6 V and accepts inputs up to 3.6 V. The device features Schmitt trigger inputs for noise immunity and IOFF circuitry for partial power-down applications. Propagation delay ranges from 0.5 ns to 11.9 ns depending on load capacitance and temperature.

Feature Summary

Provides single 2-input NAND logic function with integrated voltage-level translation capabilities
Incorporates Schmitt trigger inputs to ensure tolerance to slow input rise and fall times across the operating voltage range
Includes IOFF circuitry that disables outputs to prevent damaging backflow current during partial power-down states

Applications

Logic-level translation between 1.8 V CMOS signals and 2.5 V or 3.3 V supplies
Partial power-down mode operation in battery-powered systems
General digital logic processing requiring low static power consumption

Procurement Notes

Verify the specific ordering suffix GX against official Nexperia documentation to confirm the X2SON5 (SOT1226-3) package configuration. Ensure the requested quantity matches standard factory packaging requirements. Confirm RoHS compliance status and environmental declarations prior to final procurement authorization.

Selection Notes

Select this component when a compact NAND gate with voltage translation is required in space-constrained designs. The X2SON5 package offers thermal enhancement and extremely thin profile suitable for high-density PCB layouts. Verify that the 2.3 V to 3.6 V supply range aligns with the target system's power rails and that Schmitt trigger input characteristics meet signal integrity requirements.

Part Context

This part belongs to the Nexperia AUP logic family, designed for ultra-low power consumption and wide supply voltage operation. The 74AUP1T00 series specifically integrates voltage-level translation functionality within a single NAND gate structure, distinguishing it from standard logic gates by its ability to interface different voltage domains directly.