74AUP1T45GW,125

Overview

The Nexperia 74AUP1T45GW,125 is a single-bit translating transceiver in a TSSOP6 (SOT363-2) package. It supports bidirectional level translation between dual supply voltages VCC(A) and VCC(B), both ranging from 1.1 V to 3.6 V. The device features three-state outputs and a direction control input (DIR). Static characteristics include a maximum supply current of 0.9 μA at 25 °C and ±0.75 μA leakage at +125 °C. Dynamic performance specifies propagation delays up to 33.3 ns at 10 pF load.

Feature Summary

• Bidirectional voltage level translation across independent A and B ports
• Configurable data direction via DIR pin
• IOFF circuitry for partial power-down protection
• Schmitt trigger inputs for noise immunity

Applications

• Interfacing low-voltage nodes such as 1.2 V, 1.5 V, 1.8 V, 2.5 V, and 3.3 V
• Partial power-down applications requiring backflow prevention
• Systems with slow input rise and fall times

Procurement Notes

Verify the specific ordering suffix matches the required package type. Confirm that the component meets RoHS3 compliance standards. Ensure the ambient operating temperature range aligns with system requirements. Check datasheet derating curves for total power dissipation limits.

Selection Notes

Select this component when interfacing circuits with different supply domains. The dual-supply architecture allows flexible voltage matching. Verify that the DIR pin logic levels are compatible with the controlling microcontroller or processor.

Part Context

This part belongs to the 74AUP series of low-power CMOS logic devices. It provides a compact solution for voltage translation in space-constrained designs. The TSSOP6 package offers a small footprint suitable for surface-mount assembly.

Replacement Considerations

Check for equivalent single-supply translators if dual supplies are unavailable. Verify pinout compatibility before substituting with other manufacturers' parts.