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Product Detailed Parameters
- Description：NEXPERIA 74AUP1T58GS - LOW POWE
- Series：*
- Mfr：Nexperia USA Inc.
- Package：Bulk
- Translator Type：-
- Channel Type：-
- Number of Circuits：-
- Channels per Circuit：-
- Input Signal：-
- Output Signal：-
- Output Type：-
- Data Rate：-
- Operating Temperature：-
- Features：-
- Mounting Type：-
- Package / Case：-
- Supplier Device Package：-
- Voltage - VCCA：-
- Voltage - VCCB：-
- Grade：-
- Qualification：-
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Overview
The Nexperia 74AUP1T58GS,132 is a low-power configurable gate with voltage-level translator. It operates within a supply voltage range of 2.3 V to 3.6 V and supports ambient temperatures from -40 °C to +125 °C. The device features Schmitt-trigger inputs and IOFF circuitry for partial power-down applications. It is housed in an XSON6 package (SOT1202) with dimensions of 1.0 x 1.0 x 0.35 mm.
Feature Summary
- Configurable multiple function gate supporting AND, OR, NAND, NOR, XOR, inverter, and buffer logic functions via 3-bit input configuration.
- Low threshold Schmitt trigger inputs enable driving by 1.8 V logic levels in 3.3 V applications.
- IOFF circuitry disables the output during power-down to prevent damaging backflow current.
Applications
- Partial power-down mode operation
- Voltage level translation between 1.8 V and 3.3 V logic systems
- Configurable logic implementation in space-constrained designs
Procurement Notes
Verify the ordering suffix '132' corresponds to the XSON6 SOT1202 package variant. Confirm that the specific revision of the product data sheet matches the manufacturing date code on the component. Ensure application requirements align with the specified operating temperature range and supply voltage limits.
Selection Notes
Select this component when a single gate requires multiple logic function configurations without additional discrete components. It is suitable for designs requiring low static power consumption and high noise immunity. Verify that the required logic functions match the available configurations defined in the datasheet.
Part Context
This part belongs to the 74AUP series of low-power CMOS logic devices. The AUP family is characterized by wide supply voltage ranges and low power consumption. The 74AUP1T58 specifically integrates level translation capabilities, distinguishing it from standard logic gates that lack voltage shifting functionality.
Replacement Considerations
Direct replacements include other packages of the same logical type: 74AUP1T58GW (TSSOP6), 74AUP1T58GM (XSON6 SOT886), and 74AUP1T58GN (XSON6 SOT1115). Verify pinout compatibility and thermal dissipation characteristics when substituting package types.
FAQ
How are the logic functions configured?
The logic function is selected using the 3-bit input (A, B, C). Inputs can be connected directly to VCC or GND to configure the gate as AND, OR, NAND, NOR, XOR, inverter, or buffer.
What is the purpose of the IOFF circuitry?
The IOFF circuitry provides partial power-down mode operation by disabling the output, which prevents potentially damaging backflow current through the device when it is powered down.
