74AUP1T97GW,125

Overview

The Nexperia 74AUP1T97GW,125 is a low-power configurable gate with voltage-level translator housed in a TSSOP6 (SOT363-2) package. It operates on a supply voltage range of 2.3 V to 3.6 V and supports an ambient temperature range from -40 °C to +125 °C. The device features Schmitt-trigger inputs and IOFF circuitry for partial power-down applications. Static characteristics include a maximum supply current of 1.5 μA at extended temperatures. Dynamic performance shows propagation delays ranging from 0.5 ns to 11.9 ns depending on load capacitance and input voltage levels.

Feature Summary

• Configurable multiple-function logic gate supporting MUX, AND, OR, NAND, NOR, inverter, and buffer modes via three-bit input selection.
• Integrated voltage-level translation allowing direct driving by 1.8 V logic levels within 3.3 V applications.
• IOFF circuitry disables the output during power-down to prevent damaging backflow currents.

Applications

• Partial power-down mode operation in mixed-voltage systems
• Voltage level translation between 1.8 V and 3.3 V logic domains
• Configurable logic implementation in space-constrained designs

Procurement Notes

Verify the specific ordering suffix matches the required package variant and temperature grade. Confirm that the procurement channel provides original manufacturer documentation. Ensure compliance with JEDEC standards relevant to the target application environment. Validate that the component meets RoHS directives if applicable to the manufacturing process.

Selection Notes

Select this component when a single gate must perform multiple logic functions or require voltage translation. The wide supply voltage range accommodates various system power rails. Consider the TSSOP6 package dimensions for PCB layout constraints. Verify that the static power consumption requirements align with the specified leakage limits across the operating temperature range.

Part Context

This part belongs to the Nexperia 74AUP series of ultra-low-power CMOS logic devices. The AUP family is designed for applications requiring minimal power dissipation while maintaining high noise immunity. The 74AUP1T97 specifically addresses the need for flexible logic configuration and level shifting in portable and battery-operated electronics.

Replacement Considerations

Direct replacements must match the TSSOP6 package and 74AUP logic family specifications. Verify functional equivalence for all supported logic configurations. Ensure the substitute component supports the same voltage-level translation capabilities and IOFF functionality.