74AUP1T98GN,132

Overview

The Nexperia 74AUP1T98GN,132 is a low-power configurable gate with voltage-level translator housed in an XSON6 (SOT1115) package. It operates on a supply voltage range of 2.3 V to 3.6 V and supports an ambient temperature range from -40 °C to +125 °C. The device features Schmitt-trigger inputs and IOFF circuitry for partial power-down applications. Static supply current is limited to a maximum of 1.5 μA at standard temperatures.

Feature Summary

• Configurable multiple function gate capable of implementing MUX, AND, OR, NAND, NOR, inverter, and buffer logic functions via a 3-bit input control.
• Integrated voltage-level translation allows driving by 1.8 V logic levels within 3.3 V applications using low threshold Schmitt trigger inputs.
• IOFF circuitry disables the output during power-down to prevent damaging backflow currents.

Applications

• Partial power-down mode operation
• Voltage level translation between 1.8 V and 3.3 V domains
• Configurable logic implementation

Procurement Notes

Verify the specific suffix GN,132 corresponds to the XSON6 SOT1115 package variant. Confirm that the application environment remains within the specified -40 °C to +125 °C operating temperature range. Ensure supply voltage constraints between 2.3 V and 3.6 V are strictly maintained to avoid exceeding absolute maximum ratings.

Selection Notes

Select this component when a single gate requires reconfigurable logic functionality alongside voltage translation capabilities. The XSON6 package offers a compact footprint suitable for space-constrained designs. Verify that the required logic functions align with the available configuration options defined by the three data inputs.

Part Context

This part belongs to the 74AUP1T98 family of low-power configurable gates. The GN suffix specifically denotes the XSON6 plastic extremely thin small outline package with no leads and six terminals, identified as SOT1115. This packaging option provides a body size of 0.9 x 1.0 x 0.35 mm.

Replacement Considerations

74AUP1T98GM,132

FAQ

How is the logic function of the 74AUP1T98GN configured?

The logic function is configured using a 3-bit input (A, B, C). By connecting these inputs directly to VCC or GND, the device can be set as a MUX, AND, OR, NAND, NOR, inverter, or buffer.

What is the purpose of the IOFF circuitry in this device?

The IOFF circuitry enables partial power-down mode operation. It disables the output to prevent potentially damaging backflow current through the device when it is powered down.