74AUP2G157GN,115

Overview

The Nexperia 74AUP2G157GN,115 is a low-power single 2-input multiplexer housed in an XSON8 package (SOT1116). It selects data from inputs I0 or I1 based on the state of the common select input S, providing true and complement outputs Y and Y. The enable input E is active LOW; when HIGH, outputs are forced to defined states. Schmitt trigger inputs ensure tolerance to slow signal transitions across the 0.8 V to 3.6 V supply range. The device supports partial power-down via IOFF circuitry and operates within -40 °C to +125 °C.

Feature Summary

• Schmitt trigger action at all inputs provides tolerance to slower rise and fall times across the entire operating voltage range.
• IOFF circuitry enables partial power-down mode by disabling outputs to prevent damaging backflow current during power loss.
• High noise immunity with low noise overshoot and undershoot characteristics relative to the supply voltage.
• Robust electrostatic discharge protection exceeding specified JEDEC class limits for both Human Body Model and Charged Device Model.

Applications

• Partial power-down applications requiring isolation of powered-down sections
• Signal routing in low-voltage digital systems
• Data selection circuits with slow input transition rates

Procurement Notes

Verify the ordering suffix '115' corresponds to the XSON8 SOT1116 package variant with dimensions 1.2 x 1.0 x 0.35 mm. Confirm the temperature range specification matches the required operational environment of -40 °C to +125 °C. Ensure design compatibility with the active LOW enable logic and Schmitt trigger input requirements before integration.

Selection Notes

Select this component for designs requiring a single 2-input multiplexer with Schmitt trigger inputs to handle slow signal edges. It is suitable for applications needing partial power-down capabilities to minimize leakage current. Verify that the supply voltage remains within the 0.8 V to 3.6 V range and that the XSON8 package footprint fits the PCB layout constraints.

Part Context

This part belongs to the 74AUP series of low-power CMOS logic devices manufactured by Nexperia. The AUP series is characterized by operation at low supply voltages and high speed. The 74AUP2G157 specifically denotes a dual-gate multiplexer function, offering two independent data paths controlled by a single selector line within a compact semiconductor structure.

Replacement Considerations

Other variants in the 74AUP2G157 family include DC (VSSOP8), GT (XSON8 SOT833-1), and GS (XSON8 SOT1203). These share identical electrical specifications but differ in physical package dimensions and pinout orientation. Verify mechanical fit and soldering profile compatibility when substituting package types.

FAQ

How does the IOFF feature function?

The IOFF circuitry disables the output drivers when the device is powered down, preventing damaging backflow current through the device if its inputs or outputs are powered while VCC is at 0 V.

What is the effect of the Enable input being HIGH?

When the Enable input (E) is HIGH, the true output Y is forced LOW and the complement output Y is forced HIGH, regardless of the states of the data inputs or the select input.