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Product Detailed Parameters
- Description：MAJORITY LOGIC GATE, AUP/ULP/V S
- Series：74AUP
- Mfr：NXP USA Inc.
- Package：Bulk
- Logic Type：Configurable Multiple Function
- Number of Circuits：2
- Number of Inputs：3
- Schmitt Trigger Input：Yes
- Output Type：Single-Ended
- Current - Output High, Low：4mA, 4mA
- Voltage - Supply：0.8V ~ 3.6V
- Operating Temperature：-40°C ~ 125°C
- Grade：-
- Qualification：-
- Mounting Type：Surface Mount
- Package / Case：10-XFDFN
- Supplier Device Package：10-XSON (1.7x1)
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Overview
The 74AUP2G58 is a dual configurable multiple function gate with Schmitt-trigger inputs. Each gate can be configured as AND, OR, NAND, NOR, XOR, inverter, or buffer using a 3-bit input. Supply voltage ranges from 0.8 V to 3.6 V. Static power consumption is 0.9 μA maximum at -40 °C to +85 °C. Propagation delay is 8.7 ns typical at 1.8 V with 30 pF load. Output current is ±20 mA. Operating temperature is -40 °C to +125 °C.
Feature Summary
- Configurable logic functions via 3-bit input
- Schmitt-trigger inputs for noise immunity
- IOFF circuitry for partial power-down mode
- High ESD protection performance
Applications
- Partial power-down applications
- Mixed-signal signal routing
- Logic level translation
Procurement Notes
Verify the specific package type (TSSOP10 or XQFN10) and temperature range against the datasheet ordering information table. Confirm that the IOFF functionality meets system requirements for partial power-down scenarios. Ensure supply voltage stays within the 0.8 V to 3.6 V recommended operating conditions.
Selection Notes
Select this component when flexible logic configuration is required in a single package. The device supports multiple logic functions including AND, OR, NAND, NOR, XOR, buffer, and inverter. It is suitable for designs needing low static power consumption and high noise immunity across a wide voltage range.
Part Context
The 74AUP2G58 belongs to the Nexperia 74AUP series of low-power CMOS logic devices. It features dual gates with PCB-configurable functions. The device is designed for applications requiring minimal power consumption while maintaining high-speed performance and robust noise characteristics.
Replacement Considerations
Check for equivalent packages such as TSSOP10 or XQFN10. Verify pin compatibility and electrical specifications if substituting with other configurable logic gates from the same family.
FAQ
How are the logic functions configured?
Each gate's logic function is selected by connecting the three control inputs (nA, nB, nC) to VCC or GND according to the function selection table.
What is the purpose of the IOFF circuitry?
The IOFF circuitry disables the output during power-down, preventing damaging backflow current through the device when it is powered down.
