74AUP3G3404GMH

74AUP3G3404GMH

$0.20
  • Description:IC DUAL BUFFER SGL INVERT 8XQFN
  • Series:74AUP
  • Mfr:Nexperia USA Inc.
  • Package:Tape & Reel (TR),Bulk

SKU:f0c8a3eae6a5 Category: Brand:

  
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Product Detailed Parameters

  • Description:IC DUAL BUFFER SGL INVERT 8XQFN
  • Series:74AUP
  • Mfr:Nexperia USA Inc.
  • Package:Tape & Reel (TR),Bulk
  • Logic Type:Buffer/Inverter
  • Number of Circuits:3
  • Number of Inputs:3 Input (2, 1)
  • Schmitt Trigger Input:No
  • Output Type:Single-Ended
  • Current - Output High, Low:4mA, 4mA
  • Voltage - Supply:0.8V ~ 3.6V
  • Operating Temperature:-40°C ~ 125°C
  • Grade:-
  • Qualification:-
  • Mounting Type:Surface Mount
  • Package / Case:8-XFQFN Exposed Pad
  • Supplier Device Package:8-XQFN (1.6x1.6)

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74AUP3G3404GMH

Overview

The Nexperia 74AUP3G3404GMH is a low-power dual buffer and single inverter from the AUP logic family. It operates across a wide supply voltage range of 0.8 V to 3.6 V with Schmitt trigger inputs for noise immunity. The device features IOFF circuitry for partial power-down applications, preventing backflow current. Static supply current is limited to 1.4 μA maximum at -40 °C to +125 °C. Propagation delay ranges from 1.0 ns to 5.5 ns depending on load capacitance and voltage. It supports ESD protection exceeding 5000 V (HBM) and complies with JEDEC standards.

Feature Summary

  • Dual non-inverting buffers and one inverter with Schmitt trigger inputs
  • IOFF circuitry enables partial power-down mode operation
  • High noise immunity with low overshoot and undershoot characteristics
  • Wide operating temperature range from -40 °C to +125 °C

Applications

  • Partial power-down systems requiring backflow current prevention
  • Signal buffering in low-voltage digital circuits
  • Noise-tolerant signal transmission in portable devices
  • Level shifting interfaces within compatible voltage domains

Procurement Notes

Verify the specific suffix GMH against official Nexperia documentation to confirm package type and tape/reel specifications. Ensure compatibility with design requirements regarding lead-free status and halogen-free definitions. Confirm RoHS compliance and REACH registration status prior to integration. Check for any recent product change notices affecting marking or assembly locations.

Selection Notes

Select this component when designing systems requiring mixed buffer and inversion functions in a minimal footprint. The AUP series offers superior speed-to-power efficiency compared to older families. Verify that input voltages do not exceed the absolute maximum ratings during power-up sequences. Consider the thermal derating curves if operating near the upper temperature limits.

Part Context

This device belongs to the Nexperia 74AUP3Gxx series of ultra-low-power logic ICs. It integrates three independent logic gates into a single package, optimizing board space. The AUP family is designed for battery-powered applications where energy conservation is critical. It replaces older generation logic families while maintaining pin-out compatibility in many cases.

Replacement Considerations

Check for direct replacements such as 74AUP3G3404DC or 74AUP3G3404GT if the GMH package is unavailable. Ensure substitute parts match the required operating temperature range and electrical characteristics. Verify that alternative packages maintain the same pin configuration for drop-in replacement.

74AUP3G3404GMH74AUP3G3404GMH
$0.20
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