74AVC16373DGG,118

Overview

The Nexperia 74AVC16373DGG,118 is a 16-bit D-type transparent latch featuring separate inputs and 3-state outputs for bus-oriented applications. It consists of two sections of eight latches with 3-state true outputs. The device operates within a supply voltage range of 1.2 V to 3.6 V and complies with JEDEC standards JESD8-7, JESD8-5, and JESD8-1A. It features extremely fast propagation delays and low power consumption. The package is TSSOP48 (SOT362-1) with a body width of 6.1 mm, suitable for surface mount installation.

Feature Summary

• Dynamic Controlled Output (DCO) circuitry dynamically changes output impedance to reduce noise without speed degradation
• Low inductance multiple VCC and GND pins minimize noise and ground bounce
• Supports Live Insertion during power-up or power-down states
• Input/output tolerant up to 3.6 V

Applications

• Bus oriented applications requiring 3-state outputs
• Systems utilizing live insertion capabilities
• Termination line drive during transient conditions

Procurement Notes

Verify the specific ordering suffix

Selection Notes

Select this component when designing systems that require high-speed data latching with 3-state bus control. The wide supply voltage range supports various logic levels from 1.2 V to 3.6 V. Ensure the design accommodates the TSSOP48 package dimensions and utilizes the multiple ground and supply pins to leverage the low inductance benefits for signal integrity.

Part Context

This part belongs to the Nexperia AVC logic family, which is designed for advanced very-low-voltage CMOS applications. The 74AVC16373 specifically addresses the need for fast propagation delays and low power consumption in 16-bit latch configurations. It is distinct from other families by its specific DCO implementation and 3.6 V tolerance characteristics.

Replacement Considerations

Public confirmed substitute part numbers are not provided in the source material.