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The Nexperia 74AXP1G97GM125 is a low-power configurable multiple function gate featuring Schmitt-trigger inputs. It supports logic functions including MUX, AND, OR, NAND, NOR, inverter, and buffer via a 3-bit input configuration. The device operates across a wide supply voltage range from 0.7 V to 2.75 V with very low static and dynamic power consumption. It includes IOFF circuitry for partial power-down applications to prevent backflow current. The component is housed in an XSON6 (SOT886) package and complies with JEDEC standards.
Verify the specific ordering suffix matches the required package variant, as the GM designation corresponds to the SOT886 (XSON6) package. Confirm that the 125 suffix aligns with your internal part numbering or distributor coding system, as standard datasheets typically list 74AXP1G97GM. Ensure compliance with RoHS3 directives and check for any recent Product Change Notices regarding marking or assembly updates before finalizing procurement.
Select this component when design constraints demand extremely low power dissipation combined with flexible logic functionality in a minimal footprint. The wide supply voltage range down to 0.7 V makes it suitable for advanced low-voltage processes. Verify that the input voltage levels are compatible with the driving source, noting that inputs accept voltages up to 2.75 V regardless of the VCC level within the specified range.
This device belongs to the 74AXP family, which represents Nexperia's Advanced eXtremely Low Power logic series. It is designed for applications where power efficiency is critical, such as mobile electronics and IoT devices. The 74AXP1G97 provides a single configurable gate in a leadless package, offering routing simplification and PCB miniaturization compared to traditional discrete logic solutions.
Direct replacements include other variants in the 74AXP1G97 series such as 74AXP1G97GN, 74AXP1G97GS, and 74AXP1G97GX, provided the package type matches the board layout. Cross-family substitution with 74AUP1G97 or 74LVC1G97 requires verification of voltage compatibility and pinout alignment.