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The 74HC109N,652 is a dual positive-edge triggered JK flip-flop manufactured by Nexperia (formerly NXP Standard Products). It features individual J and K inputs, clock (CP) inputs, and asynchronous active-low set (SD) and reset (RD) inputs. The device provides complementary Q and Q outputs. It operates within a supply voltage range of 2 V to 6 V and supports through-hole DIP-16 packaging. The component functions as high-speed Si-gate CMOS logic compatible with low power Schottky TTL standards.
Verify current availability status as the product lifecycle indicates potential obsolescence or discontinuation. Confirm that the manufacturer designation reflects Nexperia operations following the 2017 separation from NXP. Ensure procurement channels provide valid datasheets matching the 74HC109 specification rather than generic family templates. Check for regional distribution restrictions before ordering.
Select this component when dual JK flip-flops with asynchronous control are required in a through-hole DIP-16 package. It is suitable for designs needing compatibility with LSTTL levels while operating on CMOS supply voltages between 2 V and 6 V. Consider the positive-edge triggering characteristic for synchronous design applications requiring stable state changes on clock transitions.
This part belongs to the 74HC series of high-speed CMOS logic devices. Historically associated with NXP Semiconductors, the standard product business was transferred to Nexperia B.V. in February 2017. The 74HC109 specifically implements dual JK flip-flop functionality, distinguishing it from other logic families like decoders or buffers found in similar numbering schemes.
Public confirmed substitute part numbers are not available in the provided documentation. Verify cross-compatibility with other 74HC109 variants from different manufacturers if sourcing is restricted due to lifecycle status.