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The Nexperia 74HC4351D,653 is an 8-channel analog multiplexer/demultiplexer with address latches in a SO20 (SOT163-1) package. It operates as a single-pole octal-throw switch with three digital select inputs (S0-S2), eight independent I/Os (Yn), and one common I/O (Z). The device supports dual supplies: VCC ranges from 2.0 V to 10.0 V for HC and 4.5 V to 5.5 V for HCT; VEE ranges from -10.0 V to 0 V. ON resistance is typically 80 Ω at 4.5 V differential supply. Propagation delay is 12 ns max at 4.5 V. ESD protection exceeds 2000 V (HBM) and 1000 V (CDM). Operating temperature spans -40 °C to +125 °C.
Verify the ordering suffix ',653' corresponds to the specific tape and reel packaging configuration defined by Nexperia. Confirm that the component status remains active production rather than obsolete or recommended for new designs. Ensure the SO20 package variant matches the required PCB footprint dimensions.
Select the 74HC4351D variant when operation requires a wide supply voltage range up to 10 V. Choose this part over the 74HCT version if the system does not strictly require TTL-compatible input thresholds. Verify that the maximum ON resistance and leakage current specifications meet the analog signal integrity requirements of the application circuit.
This component belongs to the Nexperia 74HC/HCT logic family, specifically designed for analog switching applications. It shares functional similarities with the 74HC4051 but includes additional address latching capabilities controlled by the LE pin. The D package designation indicates the standard plastic small outline package with 20 leads.
Direct substitutes include the 74HCT4351D,118 for TTL-level compatibility. Other compatible parts within the same family are the 74HC4351PW and 74HCT4351PW in TSSOP packages, provided the physical footprint allows for adaptation.
All eight switches are turned off when E1 is HIGH or E2 is LOW. The switches are enabled only when E1 is LOW and E2 is HIGH.
The Latch Enable (LE) pin controls the address latches. When LE is HIGH, the latch is transparent. A HIGH-to-LOW transition on LE latches the state present at the select inputs S0, S1, and S2.
Yes, the inputs include clamp diodes, allowing the use of current-limiting resistors to interface inputs to voltages in excess of VCC, supporting a wide analog input range from -5 V to +5 V.