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The Nexperia 74HCT112PW,112 is a dual negative-edge triggered JK flip-flop featuring asynchronous active-low set and reset inputs. It operates within a supply voltage range of 4.5 V to 5.5 V and supports input levels compatible with TTL standards. The device provides complementary Q and nQ outputs for each flip-flop circuit. It is housed in a 16-TSSOP surface-mount package and is specified for operation across an extended temperature range from -40 °C to +125 °C.
Verify current production status as this component may be subject to discontinuation notices. Confirm package variant compatibility and check for official replacement part numbers before finalizing design specifications. Ensure supply chain sources provide valid authenticity documentation.
Select this component when dual independent JK flip-flops with asynchronous control are required. The HCT series ensures TTL compatibility while maintaining CMOS performance. Verify that the 16-TSSOP package fits the PCB layout constraints and thermal requirements of the target application environment.
This device belongs to the Nexperia 74HCT family of high-speed CMOS logic integrated circuits. The 74HCT112 specifically implements dual JK flip-flop functionality with set and reset capabilities. It is designed for general-purpose digital applications requiring reliable state retention and synchronous data handling under standard logic conditions.
Public confirmed substitute part number: SN74HC193QPWRG4Q1 (Texas Instruments). Verify functional equivalence and pinout compatibility before substitution.