74LV573D,112

Latches Overview

The 74LV573D,112 is an octal D-type transparent latch with 3-state outputs manufactured by NXP USA Inc. It operates within a supply voltage range of 1.0 V to 5.5 V and features separate D-type inputs for each latch. The device includes common Latch Enable (LE) and Output Enable (OE) inputs. Propagation delay from Dn to Qn is typically 12 ns at 3.0 V to 3.6 V with a 15 pF load. Static supply current is specified up to 160 μA at 5.5 V.

Latches Feature Summary

• Wide operating voltage range supporting low-voltage applications down to 1.0 V
• Inputs accept TTL levels between 2.7 V and 3.6 V supply voltages
• ESD protection exceeds 2000 V per HBM and 200 V per MM standards
• Pin and function compatible with 74HC573 and 74HCT573

Latches Applications

• Bus-oriented applications requiring tri-state control
• Microprocessor input or output port interfacing
• Data storage in transparent latch mode

Latches Procurement Notes

Verify the specific ordering suffix

Latches Selection Notes

Select this component when pin compatibility with HC/HCT families is required alongside LV performance. Ensure the application utilizes the SO20 package variant. Confirm that the system logic levels align with the specified input thresholds across the intended operating temperature range.

Latches Part Context

This part belongs to the 74LV series of low-voltage CMOS logic devices. It is functionally identical to the 74LV373 but utilizes a different pin arrangement. The device is designed for high-speed bus operations while maintaining low power consumption typical of CMOS technology.

Latches Replacement Considerations

The 74LV373 serves as a functional equivalent with distinct pinout configuration. Direct pin-to-pin substitution requires verification of the schematic layout against the differing pin assignments defined in the datasheet.