74LV74PW,112

74LV74PW,112

  • Description:IC FF D-TYPE DUAL 1BIT 14TSSOP
  • Series:74LV
  • Mfr:Nexperia USA Inc.
  • Package:Tube

SKU:c7fcd6e000b2 Category: Brand:

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Product Detailed Parameters

  • Description:IC FF D-TYPE DUAL 1BIT 14TSSOP
  • Series:74LV
  • Mfr:Nexperia USA Inc.
  • Package:Tube
  • Function:Set(Preset) and Reset
  • Type:D-Type
  • Output Type:Complementary
  • Number of Elements:2
  • Number of Bits per Element:1
  • Clock Frequency:110 MHz
  • Max Propagation Delay @ V, Max CL:17ns @ 5V, 50pF
  • Trigger Type:Positive Edge
  • Current - Output High, Low:12mA, 12mA
  • Voltage - Supply:1V ~ 5.5V
  • Current - Quiescent (Iq):20 µA
  • Operating Temperature:-40°C ~ 125°C (TA)
  • Mounting Type:Surface Mount
  • Supplier Device Package:14-TSSOP
  • Package / Case:14-TSSOP (0.173", 4.40mm Width)
  • Input Capacitance:3.5 pF
  • Grade:-
  • Qualification:-

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74LV74PW,112

Overview

The Nexperia 74LV74PW,112 is a dual positive-edge triggered D-type flip-flop with set and reset functions. It operates within a supply voltage range of 1 V to 5.5 V and features Schmitt-trigger inputs for noise immunity. The device is housed in a TSSOP-14 surface-mount package. It supports CMOS low power consumption and provides direct interface capability with TTL levels. The component is specified for operation across extended temperature ranges.

Feature Summary

  • Dual positive-edge triggered D-type flip-flops with asynchronous active-low set and reset inputs
  • Schmitt-trigger action at all inputs ensures tolerance for slower rise and fall times
  • Wide supply voltage compatibility from 1 V to 5.5 V enables interlacing with 5 V logic

Applications

  • Data storage and register applications in mixed-voltage systems
  • Timing delay circuits requiring precise edge triggering
  • Parallel-to-serial data conversion interfaces

Procurement Notes

Verify current availability status as the product may be subject to end-of-life notices or discontinuation. Confirm RoHS compliance and specific packaging options such as tube or reel through official Nexperia channels or authorized distributors before finalizing procurement plans.

Selection Notes

Select this component when dual independent D-flip-flops are required in a compact TSSOP-14 footprint. Ensure input signals meet the Schmitt-trigger thresholds for reliable operation. Verify that the system voltage falls within the 1 V to 5.5 V operating range and that thermal conditions remain within the specified junction temperature limits.

Part Context

This part belongs to the Nexperia 74LV series of low-voltage CMOS logic devices. It provides standard digital logic functionality with enhanced noise immunity due to Schmitt triggers. The 74LV74A variant specifically offers dual flip-flops with set and reset capabilities, suitable for general-purpose digital design tasks.

Replacement Considerations

Public confirmed substitute part numbers include 74LV74PW,118 which shares identical electrical characteristics and pinout configuration while differing only in packaging format.

74LV74PW,11274LV74PW,112

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