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The Nexperia 74LV74PW,112 is a dual positive-edge triggered D-type flip-flop with set and reset functions. It operates within a supply voltage range of 1 V to 5.5 V and features Schmitt-trigger inputs for noise immunity. The device is housed in a TSSOP-14 surface-mount package. It supports CMOS low power consumption and provides direct interface capability with TTL levels. The component is specified for operation across extended temperature ranges.
Verify current availability status as the product may be subject to end-of-life notices or discontinuation. Confirm RoHS compliance and specific packaging options such as tube or reel through official Nexperia channels or authorized distributors before finalizing procurement plans.
Select this component when dual independent D-flip-flops are required in a compact TSSOP-14 footprint. Ensure input signals meet the Schmitt-trigger thresholds for reliable operation. Verify that the system voltage falls within the 1 V to 5.5 V operating range and that thermal conditions remain within the specified junction temperature limits.
This part belongs to the Nexperia 74LV series of low-voltage CMOS logic devices. It provides standard digital logic functionality with enhanced noise immunity due to Schmitt triggers. The 74LV74A variant specifically offers dual flip-flops with set and reset capabilities, suitable for general-purpose digital design tasks.
Public confirmed substitute part numbers include 74LV74PW,118 which shares identical electrical characteristics and pinout configuration while differing only in packaging format.