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— IC芯片 | 连接器 | 传感器 | 被动器件 —
The Nexperia 74LVC1G123GT,115 is a single retriggerable monostable multivibrator with Schmitt trigger inputs. It operates within a supply voltage range of 1.65 V to 5.5 V and supports an ambient temperature range from -40 °C to +125 °C. The device features propagation delays ranging from 1.2 ns to 17.6 ns depending on load capacitance and voltage. Output drive capability reaches ±24 mA at 3.0 V and ±32 mA at higher voltages. Quiescent current varies between 0.1 μA and 650 μA based on operating conditions. The component utilizes an XSON8 package (SOT833-1) with dimensions of 1 × 1.95 × 0.5 mm.
Verify the specific ordering suffix GT corresponds to the XSON8 SOT833-1 package variant. Confirm that the required temperature range meets the -40 °C to +125 °C specification. Ensure external resistor and capacitor values align with the recommended operating conditions for desired pulse widths. Check JEDEC compliance requirements if applicable to the target system environment.
Select this component when a single-channel monostable multivibrator with retriggering capability is required. The wide supply voltage range suits low-power and standard logic systems. Consider the XSON8 package for space-constrained PCB layouts. Verify that the input signal characteristics match the Schmitt trigger thresholds for reliable triggering across the full temperature range.
This device belongs to the 74LVC family of CMOS logic integrated circuits manufactured by Nexperia. The LVC series is designed for low-voltage operations while maintaining compatibility with various logic families. The 74LVC1G123 specifically provides monostable multivibrator functionality in a single-gate configuration, distinguishing it from buffer or gate logic components within the same product line.
Other variants within the 74LVC1G123 family, such as those in TSSOP8 or VSSOP8 packages, offer identical electrical specifications but differ in physical footprint. Direct pin-to-pin replacement requires matching the package type to the existing PCB layout constraints.