78Q8392LA03-28CHR/F

Overview

The 78Q8392L/A03 is a low power Ethernet coaxial transceiver designed as a replacement for the 78Q8392L/A02. It integrates analog transmit and receive buffers, a 10 MHz on-board oscillator, timing logic for jabber and heartbeat functions, output drivers, bandgap reference, current reference, and collision detector. The device interfaces single-ended coaxial cable signals with Manchester-encoded differential logic signals. It supports IEEE 802.3 10Base5 and 10Base2 standards. Supply current is typically 6 mA in non-transmitting mode and 65 mA in transmitting mode at VEE = -9V. It is available in 16-pin plastic DIP and 28-pin PLCC packages.

Feature Summary

• Integrates all transceiver functions including receiver, transmitter, collision detection, jabber timer, and heartbeat function.
• Includes an internal 10 MHz oscillator and advanced BiCMOS process technology.
• Features squelch circuitry at all inputs to reject noise and crosstalk.
• Supports externally selectable CED heartbeat operation for compatibility with IEEE 802.3 compatible repeaters.

Applications

• Ethernet II network implementations
• IEEE 802.3 10Base5 thick coaxial networks
• IEEE 802.3 10Base2 thin coaxial networks

Procurement Notes

Verify the specific package variant required, either the 16-pin Plastic DIP or the 28-pin PLCC, when sourcing replacements. Confirm that the design utilizes the correct external resistor value (976 Ω) between RR+ and RR- pins, as this differs from previous generation components. Ensure proper thermal handling for the VEE pins due to heat dissipation requirements during transmission.

Selection Notes

Select this component when upgrading from the 78Q8392L/A02, as only a single resistor value change is needed. Choose the 16-pin DIP for standard through-hole applications or the 28-pin PLCC for higher density surface mount designs. Ensure the system provides a stable -9V supply within the specified tolerance range for optimal electrical performance.

Part Context

This component is part of the Teridian Semiconductor 78Q8392L series, now associated with Analog Devices Inc./Maxim Integrated branding. It serves as a legacy solution for 10 Mbps Ethernet over coaxial media. The device replaces older models while maintaining functional compatibility with existing MAU environments.

Replacement Considerations

The datasheet identifies the 78Q8392L/A02 as the predecessor model. Upgrading requires changing the external resistor connected between RR+ and RR- from 1kΩ to 976Ω. No other functional changes are necessary for direct replacement.

FAQ

How does the device handle collision signaling?

When enabled via the HBE pin, the device outputs a 10 MHz signal on the CD± pins if the average DC level on RXI exceeds the collision threshold, indicating a collision, heartbeat, or jabber state.

What is the purpose of the CDS pin?

The CDS pin is the Collision Detect Sense input. It should be connected directly to the coaxial shield to eliminate ground loop noise and avoid ground drops altering the receive mode collision threshold.

How is the jabber protection implemented?

If valid data persists on the TX± pins for more than 20 ms, the jabber timer disables the transmitter output and enables the 10 MHz output on CD±. The latch resets after 0.5 seconds of inactivity.