89H24NT24G2ZBHLG

Overview

The Renesas Electronics Corporation 89H24NT24G2ZBHLG is a PCI Express Gen2 system interconnect switch providing 24 lanes and 24 ports. It operates with a maximum clock frequency of 125 MHz and supports a data rate of 192 Gb/s. The device utilizes a 32/64-bit data bus width and functions within a voltage range of 1 V to 3.3 V. Designed for surface mount installation, it is housed in a 324-FCBGA package. The component supports an operating temperature range from 0°C to +70°C and includes humidity sensitivity features.

Feature Summary

• Non-blocking switch architecture optimized for high-performance system interconnect applications
• Partitionable switch architecture enabling true multi-root support capabilities
• Supports multiple non-transparent bridging (NTB) functions for isolated domain communication

Applications

• High-performance system interconnect switching
• Multi-root server architectures
• I/O expansion systems requiring deterministic latency

Procurement Notes

Verify the specific suffix ZBHLG against official Renesas documentation to confirm lead-free status and tray packaging details. Confirm current lifecycle status as obsolete or limited supply through authorized channels before integration planning.

Selection Notes

Select this component when 24 PCIe Gen2 lanes are required in a single integrated circuit. Ensure the design accommodates the 324-FCBGA package dimensions and thermal requirements. Verify that the 1V to 3.3V power domains align with the target system's voltage rails.

Part Context

This part belongs to the 89H24NT24G2 series of PCIe switches. It shares architectural similarities with other members like the 89H24NT6AG2 but offers higher port density. The ZBHLG suffix typically denotes specific packaging and environmental compliance variations within the family.

Replacement Considerations

Publicly confirmed substitute part numbers are not available in the provided source material. Consult Renesas for current equivalent recommendations given the obsolete status.