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Product Detailed Parameters
- Description:IC EMBEDDED PC MAIN CLK 56TSSOP
- Series:-
- PLL:Yes
- Mfr:Renesas Electronics Corporation
- Main Purpose:AMD CPU, PCI Express (PCIe)
- Input:Crystal
- Output:HTT
- Number of Circuits:1
- Ratio - Input:Output:1:17
- Differential - Input:Output:No/Yes
- Frequency - Max:293.75MHz
- Voltage - Supply:3.135V ~ 3.465V
- Operating Temperature:0°C ~ 70°C
- Mounting Type:Surface Mount
- Package / Case:56-TFSOP (0.240", 6.10mm Width)
- Supplier Device Package:56-TSSOP
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Overview
The ICS9EPRS475 is a main clock synthesizer designed for AMD embedded systems, providing all required clocks. It features an SMBus interface for full control and includes outputs for two Greyhound-compatible K8 CPU pairs, four low-power differential SRC pairs, two SouthBridge SRC pairs, three ATIG pairs, one selectable 100MHz differential or 66MHz single-ended HTT clock, two 48MHz USB clocks, and three 14.318MHz reference clocks. The device supports spread spectrum for EMI reduction and allows output disabling via SMBus.
Feature Summary
- Provides multiple low-power differential clock pairs including CPU, SRC, SB_SRC, and ATIG outputs with integrated series resistors.
- Features cycle-to-cycle jitter specifications of less than 150ps for CPU outputs and less than 125ps for SRC and ATIG outputs.
- Includes +/- 300ppm frequency accuracy on CPU, SRC, and ATIG clocks.
- Supports selectable 100MHz differential or 66MHz single-ended HyperTransport (HTT) clock.
Applications
- AMD M690T/780E systems
- System clock generation for embedded AMD-based platforms
Procurement Notes
Verify the manufacturer designation as Integrated Circuit Systems, Inc. (ICS), which was acquired by IDT and subsequently Renesas Electronics Corporation. Confirm that the datasheet version matches the specific design phase requirements, as the document notes characteristic data may be design goals subject to change without notice.
Selection Notes
Select this component for designs requiring comprehensive clock synthesis for AMD embedded architectures. Ensure the system utilizes external crystal load capacitors for maximum frequency accuracy. Verify compatibility with PCI Express Generation 2.0 standards if applicable to the peripheral interfaces.
Part Context
This part belongs to the ICS9EPRS475 family of clock synthesizers. It is specifically engineered to replace discrete clocking solutions in AMD-based embedded motherboards, consolidating CPU, chipset, and peripheral clock generation into a single 56-pin TSSOP package.
Replacement Considerations
Publicly confirmed substitute part numbers are not available in the provided documentation. Due to the specialized nature of this AMD-specific synthesizer and the corporate acquisitions involving ICS, IDT, and Renesas, direct pin-compatible replacements require consultation with the manufacturer's technical support.
FAQ
What is the function of the SEL_HTT66 pin?
The SEL_HTT66 pin is a 3.3V tolerant latched input used to select the HyperTransport clock frequency. A logic 0 selects the 100MHz differential HTT clock, while a logic 1 selects the 66MHz 3.3V single-ended HTT clock.
How does the RESTORE# pin operate?
RESTORE# is an open-drain I/O pin. As an input, it restores the PLLs to their power-up default state when driven low. As an output, it is driven low when the internal watchdog hardware timer expires and is cleared upon reset or disablement of the timer.
Are external series or shunt resistors required for the LPRS outputs?
No external 50-ohm shunt resistors to ground or 33-ohm series resistors are needed for the SRC, SB_SRC, and ATIG LPRS outputs. The CPUKG outputs also do not require the 33-ohm series resistor.
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