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Product Detailed Parameters
- Description:IC CLOCK GENERATOR 24VFQFPN
- Series:PhiClock™
- Package:Tape & Reel (TR)
- Mfr:Renesas Electronics Corporation
- PLL:Yes
- Input:HCSL, LVCMOS, LVDS, Crystal
- Output:CML, HCSL, LP-HCSL, LVCMOS, LVDS, LVPECL
- Number of Circuits:1
- Ratio - Input:Output:1:06
- Differential - Input:Output:No/Yes
- Frequency - Max:156.25MHz, 200MHz, 325MHz
- Divider/Multiplier:Yes/No
- Voltage - Supply:1.71V ~ 1.89V, 2.375V ~ 2.625V, 3.135V ~ 3.465V
- Operating Temperature:-40°C ~ 85°C (TA)
- Mounting Type:Surface Mount
- Package / Case:24-WFQFN Exposed Pad
- Supplier Device Package:24-VFQFPN (4x4)
- Type:Clock Generator
- Grade:-
- Qualification:-
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Overview
The 9FGV1004B117NBGI8 is a programmable clock generator from the Renesas PhiClock family. It provides four differential output pairs plus two LVCMOS reference outputs, supporting PCIe Gen1–4 compliance with typical phase jitter of 267fs RMS at 156.25MHz (12kHz–20MHz). The device accepts integer and fractional or spread-spectrum inputs, offering frequencies from 1MHz to 325MHz for integer outputs in LP-HCSL or LVDS formats. It operates on individual 1.8V to 3.3V core and VDDO supplies, housed in a 4x4mm 24-VFQFPN or 24-LGA package.
Feature Summary
- PCIe Gen1–4 compliant with 267fs RMS typical phase jitter at 156.25MHz
- Four programmable differential output pairs plus two LVCMOS reference outputs
- Supports LP-HCSL, LVDS, and LVCMOS I/O standards with 1.8V to 3.3V supply options
- Configurable via hardware select pins or I²C software control
Applications
- PCI Express timing solutions
- High-speed data communication systems
- Server and storage infrastructure clocks
Procurement Notes
Verify the specific suffix B117 against official Renesas documentation to confirm factory configuration parameters. Confirm package availability as the component may be offered in both VFQFPN and LGA variants depending on the exact ordering code. Check current distribution status as availability can vary by region.
Selection Notes
Select this model when PCIe Gen1–4 jitter specifications are required. Ensure the design supports the necessary 1.8V or 3.3V dual-supply architecture. Verify that the 24-pin package footprint matches the PCB layout constraints. Consider using Timing Commander software for configuration if I²C control is preferred over hardware pin selection.
Part Context
This part belongs to the 9FGV1004 series within the PhiClock programmable clock generator family. It shares architectural similarities with other members like the 9FGV1004C but differs in specific factory-programmed output frequencies and configurations defined by the B117 suffix.
Replacement Considerations
Direct replacements include other 9FGV1004 variants such as 9FGV1004CQ501LTGI8, provided the output frequency configuration matches the application requirements. Cross-model substitution requires verification of I/O voltage levels and package dimensions.
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