A3P060-CSG121

Field Programmable Gate Array Overview

The A3P060-CSG121 is a ProASIC3 Flash Field Programmable Gate Array manufactured by Microsemi. It features 60,000 system gates and 512 typical equivalent macrocells. The device includes 18 kbits of embedded RAM organized in four 4,608-bit blocks and one 1 kbit FlashROM block. It supports up to 96 user I/Os within two I/O banks. Operating at a maximum frequency of 350 MHz, it utilizes a 130-nm flash-based CMOS process with a core voltage range of 1.425 V to 1.575 V. The component is housed in a CS121 Chip Scale Package with 121 pins, measuring 6 mm x 6 mm.

Field Programmable Gate Array Feature Summary

• Nonvolatile flash technology enables instant-on operation without external boot PROMs.
• Integrated AES decryption engine provides secure in-system programming and IP protection.
• VersaTile architecture offers high logic utilization with flexible routing resources.
• Supports mixed-voltage I/O standards including LVCMOS, LVTTL, and PCI.

Field Programmable Gate Array Applications

• Secure remote field updates over public networks
• System initialization and critical task execution before processor wake-up
• Consumer electronics requiring low power and small form factors
• Networking and communications equipment

Field Programmable Gate Array Procurement Notes

Verify the specific ordering suffix against the manufacturer's current datasheet to confirm package type, temperature grade, and security licensing status. Ensure compatibility with existing PCB footprints for the CS121 package. Confirm RoHS compliance requirements if applicable to the target assembly process.

Field Programmable Gate Array Selection Notes

Select this device for designs requiring nonvolatile configuration and immediate system readiness. Consider the 60,000 gate capacity and 96 I/O limit for moderate complexity logic. Verify that the required I/O voltages align with the supported bank configurations. Check if ARM Cortex-M1 support is needed, as this model does not include it.

Field Programmable Gate Array Part Context

This component belongs to the Microsemi ProASIC3 Flash family, which bridges the gap between ASIC costs and FPGA flexibility. It is designed for applications needing high security and low power consumption. The family supports various packages, with the CS121 offering a compact footprint suitable for space-constrained designs.

Field Programmable Gate Array Replacement Considerations

Direct pin-compatible replacements within the same density are limited. Higher density options like the A3P125 may require design migration. Lower density devices such as the A3P030 lack PLL and RAM support. Consult the ProASIC3 FPGA Fabric User Guide for migration requirements.

Field Programmable Gate Array FAQ

Does the A3P060 support ARM Cortex-M1 processors?

No, the A3P060 does not support ARM Cortex-M1 processors. Devices with ARM support begin with the M1A3P prefix.

What is the maximum operating frequency of the A3P060?

The maximum system performance frequency is 350 MHz.

How many I/O banks does the A3P060 have?

The A3P060 has two I/O banks.