A3PE600-PQ208I

Overview

The A3PE600-PQ208I is a ProASIC3E flash-based Field Programmable Gate Array manufactured by Microsemi. It provides 600,000 system gates and 13,824 VersaTiles (D-flip-flops). The device includes 108 kbits of True Dual-Port SRAM organized into 24 blocks of 4,608 bits each. It features six Clock Conditioning Circuits (CCCs) with integrated PLLs and supports up to 147 user I/Os in the PQFP-208 package. The maximum operating frequency is 350 MHz. The 'I' suffix indicates an industrial temperature range of -40°C to +100°C junction temperature.

Feature Summary

• Nonvolatile flash technology enables Instant On Level 0 support without external boot PROMs.
• Integrated AES decryption engine and FlashLock security for secure in-system programming.
• Flexible I/O structure supporting mixed-voltage operation across eight banks.
• Embedded SRAM blocks configurable as dual-port memory or synchronous FIFOs.

Applications

• Secure remote field updates over public networks
• Internet protocol addressing and system calibration storage
• High-performance digital signal processing interfaces

Procurement Notes

Verify the specific ordering suffix against the manufacturer's current datasheet revision to confirm package type and temperature grade. Ensure the component matches the required speed grade for the target application timing constraints. Check for RoHS compliance status if environmental regulations apply to the final assembly process.

Selection Notes

Select this device when nonvolatile configuration and instant-on capability are required. The PQ208 package limits available CCCs to two PLLs; larger packages offer full clocking resources. Verify that the 147 user I/O count meets interface requirements. Consider the 130-nm process node for power consumption characteristics relative to newer technologies.

Part Context

This component belongs to the ProASIC3E family, which succeeded the ProASIC PLUS series. It utilizes a 130-nm CMOS process with seven metal layers. The family offers a balance between ASIC unit costs and FPGA flexibility. It is designed for applications requiring high security and low power consumption in consumer, networking, and avionics markets.

Replacement Considerations

Pin-compatible alternatives within the ProASIC3E family include higher-density devices such as the A3PE1500 and A3PE3000 in the same PQ208 package. Lower density options like the A3P600 from the standard ProASIC3 family may be considered if flash technology is not strictly required.

FAQ

How many PLLs are available in the PQ208 package?

The PQ208 package supports only two PLLs, located at the center east and west sides, although all six CCC blocks remain usable for clock delay operations.

What is the function of the on-chip FlashROM?

The 1 kbit FlashROM provides user-accessible nonvolatile storage for data such as IP addressing, calibration settings, serialization, and secure key storage.

Does the device require an external configuration PROM?

No, the flash-based architecture stores configuration data on-chip, eliminating the need for external boot PROMs and enabling Instant On functionality.