AD10200BZ

Overview

The AD10200BZ is a dual-channel, 12-bit analog-to-digital converter (ADC) with a minimum sample rate of 105 MSPS. It integrates on-module signal conditioning and transformer-coupled front-ends optimized for direct IF sampling. The device features two independent wide-dynamic range ADCs with on-chip track-and-hold circuitry. Key electrical parameters include a 2.048 V p-p input voltage range, 50 Ω input impedance, and 2.5 V internal reference output. Power dissipation is approximately 0.85 W per channel, operating with 5.0 V analog and 3.3 V digital supplies.

Feature Summary

• Dual-channel architecture with >80 dB channel-to-channel isolation
• Integrated AC-coupled signal conditioning with gain flatness < 0.2 dB up to Nyquist
• Input VSWR of 1.1:1 to Nyquist frequency
• 80 dB Spurious-Free Dynamic Range (SFDR)
• Two's complement output format with 3.3 V or 5 V CMOS-compatible levels

Applications

• Radar IF Receivers
• Phased Array Receivers
• Communications Receivers
• Secure Communications
• GPS Antijamming Receivers

Procurement Notes

Verify the MIL-38534 qualification level (Class H for –50°C to +125°C) against specific project requirements. Confirm the ceramic chip carrier package integrity upon receipt. Ensure proper ESD handling procedures are followed due to device sensitivity. Cross-reference the ordering suffix 'BZ' with the manufacturer's current guide to confirm availability and revision status.

Selection Notes

Select this component when high-density, matched dual-channel performance is required for IF sampling applications. The integrated signal conditioning reduces external component count and board area. Ensure the system clock provides low jitter (<0.25 ps rms) to maintain optimal SNR. Verify that the 50 Ω single-ended input interface matches the source impedance of the preceding stage.

Part Context

The AD10200 is part of Analog Devices' high-speed data converter portfolio, designed specifically for demanding RF and microwave applications. The 'BZ' suffix denotes the 68-lead ceramic chip carrier package suitable for military and industrial environments. It serves as a complete solution by combining the ADC core with necessary analog front-end conditioning.

Replacement Considerations

Public confirmed substitute part numbers are not available in the provided documentation. Evaluate alternatives based on matching 12-bit resolution, 105+ MSPS speed, dual-channel configuration, and ceramic packaging requirements.

FAQ

What is the recommended clock input type for the AD10200?

Differential PECL/ECL encode inputs are recommended for optimum performance. The inputs are fully TTL/CMOS compatible but require differential driving for best results.

Does the AD10200 require an external voltage reference?

No, the AD10200 includes an internal 2.5 V voltage reference (VREFOUT), so an external reference is not required.

What is the minimum guaranteed conversion rate?

The minimum guaranteed conversion rate is 10 MSPS. Clock rates below 10 MHz should be avoided as dynamic performance may degrade.