AD10201AB

Overview

The AD10201AB is a dual-channel, 12-bit analog-to-digital converter (ADC) from Analog Devices Inc., designed for intermediate frequency (IF) sampling applications. It integrates two independent ADC channels within a single 385-lead BGA package (35 mm × 35 mm). Each channel operates at a guaranteed sample rate of 105 MSPS with an input bandwidth up to 250 MHz. The device features on-module signal conditioning, including AC-coupled transformer front ends optimized for direct IF sampling. Electrical specifications include a typical Spurious-Free Dynamic Range (SFDR) of 80 dB and channel-to-channel isolation exceeding 90 dB. Power dissipation is rated at 900 mW per channel, with total power consumption reaching 2200 mW under maximum conditions.

Feature Summary

• Dual independent 12-bit, 105 MSPS ADCs with 250 MHz analog input bandwidth
• Integrated AC-coupled signal conditioning with transformer-coupled front ends
• High channel-to-channel isolation (>90 dB) and SFDR (80 dB)
• Internal 2.5 V voltage reference and track-and-hold circuitry
• 3.3 V or 5 V CMOS-compatible digital outputs in Two’s Complement format

Applications

• Wireless and wired broadband communications base stations
• Zero-IF or direct IF sampling subsystems
• Radar and satellite subsystems
• Local Multipoint Distribution Service (LMDS)

Procurement Notes

Verify the specific ordering suffix AB, which denotes an ambient temperature range of –25°C to +85°C, against system thermal requirements. Confirm that the 385-lead BGA package footprint matches the PCB layout design. Ensure supply voltages remain stable within ±5% for normal operation. Check for ESD sensitivity precautions during handling. Validate that the evaluation board AD10201/PCB is available if prototyping support is needed.

Selection Notes

Select the AD10201AB when high dynamic range and wide bandwidth are required for direct IF sampling. The integrated signal conditioning reduces external component count compared to discrete solutions. Consider the 900 mW per channel power dissipation for thermal management in the BGA package. Ensure the clock source provides low jitter (<0.25 ps rms) to maintain SNR performance. Differential ENCODE inputs are recommended for optimum timing performance.

Part Context

The AD10201 belongs to Analog Devices' family of high-speed data converters designed for demanding communication and radar applications. It utilizes a switched-capacitor pipeline architecture to achieve 12-bit resolution at 105 MSPS. The device is distinct from lower-speed or single-channel variants by its integrated transformer coupling and dual-channel independence. It serves as a complete solution for wideband signal acquisition without requiring external front-end amplifiers or complex matching networks.

Replacement Considerations

Public confirmed substitute part numbers are not provided in the source material.