AD10242BZ

Overview

The AD10242BZ is a dual-channel, 12-bit, 40 MSPS analog-to-digital converter (ADC) housed in a 68-lead ceramic leaded chip carrier (CLCC). It integrates a complete signal chain including precision amplifiers, reference voltage sources, and output buffers. The device operates with ±5.0 V supplies for analog conditioning and a separate +5.0 V supply for digital conversion. Key electrical specifications include a typical Signal-to-Noise Ratio (SNR) of 66 dB at 4.85 MHz input, a Spurious-Free Dynamic Range (SFDR) of 79 dBFS, and channel-to-channel isolation exceeding 80 dB. It is manufactured on the MIL-PRF-38534 MCM line and qualified for operation from –55°C to +125°C.

Feature Summary

• Dual matched ADCs with integrated input signal conditioning and selectable bipolar input ranges (±0.5 V, ±1.0 V, ±2.0 V).
• Laser-trimmed channels for gain and offset matching, providing channel-to-channel crosstalk performance better than 80 dB.
• Guaranteed 40 MSPS sampling rate with dynamic performance specified over the entire Nyquist band.
• Low power dissipation of less than 2 W when operating off ±5.0 V supplies.

Applications

• Radar Processing
• Communications Receivers
• FLIR Processing
• Secure Communications
• I/Q Signal Processing Applications

Procurement Notes

Verify that the component meets MIL-STD-883B compliance requirements if military-grade qualification is necessary for the application. Confirm the specific test level (I, II, III, IV, V, or VI) required, as AC testing may be performed on a sample basis depending on the subgroup. Ensure proper ESD precautions are observed during handling due to the sensitivity of the device.

Selection Notes

Select the appropriate analog input terminal (AIN1, AIN2, or AIN3) based on the desired full-scale input voltage range of ±0.5 V, ±1.0 V, or ±2.0 V. Consider using differential encoding for potential SNR improvements of 1 dB to 3 dB compared to single-ended driving. Verify that the system clock source has low jitter to maintain optimal SNR performance, as excessive jitter directly limits converter accuracy.

Part Context

The AD10242 utilizes two each of the AD9632 amplifier, OP279 buffer, and AD9042 ADC within a custom Monolithic Microwave Integrated Circuit (MCM). This integration provides space, performance, and cost advantages over discrete solutions. The device is designed to minimize additional external signal conditioning required for multiple functions within a single system.

Replacement Considerations

Publicly confirmed substitute part numbers are not available in the provided documentation. Contact the factory for additional custom options, such as configurations allowing direct AC coupling of the ADC by bypassing the front-end amplifier section.

FAQ

How is the logic threshold for the ENCODE input adjusted?

The logic threshold can be modified by adding an external resistor (Rx) to the voltage divider network connected to the ENCODE pins. Equations in the datasheet define how to calculate Rx to raise or lower the trip point from the nominal 1.6 V bias.

Can the AD10242 operate with unipolar inputs?

Yes, by placing a 2.43 kΩ resistor between UPOS and UCOM, the device supports positive unipolar signals (1 V, 2 V, or 4 V full-scale). Similarly, a 2.67 kΩ resistor between UNEG and UCOM allows for negative unipolar signals. Offset calibration is required in these modes.

What is the recommended method for driving the ENCODE input for best performance?

Driving the encode inputs differentially is recommended to achieve increased performance, potentially improving SNR by 1 dB to 3 dB. The signal should be AC-coupled into the ENCODE and /ENCODE pins using a transformer or capacitor network.