AD13280AF

Overview

The AD13280 is a dual-channel, 12-bit, 80 MSPS analog-to-digital converter (ADC) with integrated analog input signal conditioning. It utilizes a multipass pipeline architecture and laser-trimmed thin-film resistor networks to achieve high channel matching and isolation. The device operates with ±5.0 V analog supplies and a 3.3 V digital supply. Key electrical specifications include a typical Signal-to-Noise Ratio (SNR) of 70 dBFS at 10 MHz input, an 80 dB Spurious-Free Dynamic Range (SFDR), and 90 dB channel-to-channel isolation. Each channel features selectable bipolar input ranges of ±0.5 V or ±1.0 V for single-ended operation and ±1 V for differential inputs.

Feature Summary

• Dual independent channels operating at up to 80 MSPS with 12-bit resolution.
• Integrated signal conditioning including amplifiers, references, and output terminators.
• Selectable analog input configurations: single-ended (±0.5 V/±1.0 V) or differential (±1 V).
• High performance metrics: 80 dB SFDR, 90 dB channel-to-channel isolation, and 0.3 ps rms aperture uncertainty.

Applications

• Radar processing systems optimized for I/Q baseband operation.
• Phased array receiver architectures.
• GPS antijamming receivers.
• Multichannel, multimode communication receivers.

Procurement Notes

Verify the specific ordering suffix against the manufacturer's official Ordering Guide to confirm package type and temperature range. Confirm that power supply requirements match the system design, as the device requires separate ±5.0 V analog rails and a 3.3 V digital rail. Ensure thermal management solutions are adequate for the specified power dissipation per channel.

Selection Notes

Select this component when a complete, dual-channel ADC solution with built-in front-end amplification is required to minimize external components. Choose based on the necessary analog input impedance (50 Ω, 100 Ω, or 200 Ω) and voltage range. Verify that the system clock source meets the low jitter requirements (<0.3 ps rms) to maintain specified SNR and SFDR performance at 80 MSPS.

Part Context

The AD13280 belongs to Analog Devices' family of high-speed data converters designed for complex signal processing applications. It integrates custom ADC ICs alongside standard components like the AD8045, AD8138, and AD8031 within a single 68-lead ceramic gull-wing package. This integration allows for significant board area savings while maintaining precise channel matching through laser-trimmed resistor networks.

Replacement Considerations

No direct public substitute part numbers are documented in the provided datasheet. When evaluating alternatives, ensure compatibility with the ±5.0 V analog supply requirement and the 3.3 V digital interface. Verify that replacement devices offer comparable channel-to-channel isolation and integrated signal conditioning if board space reduction is a priority.

FAQ

How is the analog input impedance configured?

The input impedance is determined by the connection of the AMP-IN-X-1 and AMP-IN-X-2 pins. AMP-IN-X-1 provides 100 Ω impedance if AMP-IN-X-2 is open, or 50 Ω if AMP-IN-X-2 is shorted to ground. AMP-IN-X-2 provides 200 Ω impedance if AMP-IN-X-1 is open.

What is the recommended method for driving the encode clock?

For optimum performance, the AD13280 should be clocked differentially using a low-jitter source. A preferred method involves converting a single-ended clock to differential via an RF transformer, with back-to-back Schottky diodes limiting the differential voltage swing to approximately 0.8 V p-p.

What are the available analog input ranges?

The device supports selectable bipolar input ranges. For single-ended inputs, the ranges are ±0.5 V (using AMP-IN-X-1) and ±1.0 V (using AMP-IN-X-2). For differential inputs (A+IN/A–IN or B+IN/B–IN), the nominal full-scale range is ±1 V.