AD1859JR

Overview

The AD1859JR is a stereo, single-supply 18-bit integrated SD DAC from Analog Devices. It operates on a single +5 V supply and features a variable rate digital interpolation filter, multibit sigma-delta modulator with dither, and jitter-tolerant DAC architecture. The device includes an on-chip digital PLL for asynchronous master clocking, rejecting sample clock jitter by 6 dB per octave above and below 15 Hz. Key electrical specifications include a dynamic range of 94 dB (A-weighted), –88 dB THD+N, and buffered analog outputs capable of driving a 2 kΩ load. It supports continuously variable sample rates and offers flexible serial data input modes.

Feature Summary

• Multibit Sigma-Delta Modulator: Employs a four-bit modulator with triangular PDF dither to reduce out-of-band noise energy and improve linearity compared to traditional single-bit architectures.
• Digital Phase Locked Loop (PLL): Provides asynchronous master clock capability, locking to the new sample rate in approximately 100 ms and rejecting jitter components 15 Hz above and below the sample frequency.
• Integrated Analog Filtering: Includes second-order switched capacitor discrete time and first-order continuous time low-pass filters, eliminating the need for external reconstruction filtering.
• Flexible Serial Interfaces: Supports I2S-Justified, Left-Justified, Right-Justified, and DSP Serial Port modes via BCLK, LRCLK, and SDATA pins; controlled via SPI-compatible port.

Applications

• Digital Cable TV and Direct Broadcast Satellite Set-Top Decoder Boxes
• Digital Video Disc, Video CD, and CD-I Players
• High Definition Televisions and Digital Audio Broadcast Receivers
• CD, CD-R, DAT, DCC, ATAPI CD-ROM, and MD Players

Procurement Notes

The AD1859JR is designated as obsolete by Analog Devices. Verification of current availability requires checking authorized distributors or surplus suppliers, as standard manufacturing channels no longer support this part number. Ensure compliance with RoHS directives if required by the target application, noting that older obsolete parts may not meet current environmental standards.

Selection Notes

Select the AD1859JR when a complete stereo DAC subsystem with integrated oversampling and jitter rejection is required. It is suitable for designs needing asynchronous master clock operation without high-frequency synchronous clocks. Consider the 28-pin SOIC package (R-28) for surface mount assembly. Verify compatibility with 16-bit or 18-bit two's complement serial data formats and ensure the system can provide the necessary +5 V single supply.

Part Context

The AD1859JR belongs to the AD1859 family of audio DACs, which are designed for high-performance digital audio playback. The 'JR' suffix indicates the -40°C to +105°C industrial temperature range and the 28-Lead SOIC package. This component integrates functions typically requiring multiple discrete chips, including the DAC, interpolation filter, and analog output drivers, into a single monolithic CMOS die.

Replacement Considerations

As the AD1859JR is obsolete, direct replacements must be sourced from surplus inventory or evaluated for pin-to-pin and functional compatibility. Potential alternatives should offer similar 18-bit resolution, stereo output, and +5 V operation. Verify that substitute devices support the same serial interface protocols (I2S, DSP mode) and jitter rejection characteristics to maintain system performance.