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The AD568KQ is a 12-bit ultrahigh-speed monolithic digital-to-analog converter (DAC) from Analog Devices. It utilizes a complementary bipolar process to achieve current settling to 0.025% in 35 ns and voltage settling to 0.025% in 50 ns. The device features a high-stability buried zener reference, guaranteed monotonicity over temperature, and a 10.24 mA full-scale output suitable for video applications. It operates on dual supplies of ±13.5 V to ±16.5 V and is housed in a 24-lead ceramic DIP package rated for operation between 0 °C and +70 °C.
Verify the component grade matches the required performance specifications. The AD568KQ offers tighter linearity and gain drift tolerances compared to the AD568JQ variant. Confirm that the application environment remains within the specified 0 °C to +70 °C operating temperature range for this specific package type.
Select the AD568KQ when precise linearity is critical, as it guarantees ±1/4 LSB maximum linearity error at +25°C. This model provides a maximum gain drift of ±30 ppm/°C, which is superior to the ±50 ppm/°C found in other grades. Ensure the design accommodates the required ±15 V power supplies and the 24-lead skinny DIP footprint.
The AD568KQ belongs to the AD568 family of ultrahigh-speed DACs. It shares the same physical package and core architecture as the AD568JQ and AD568SQ but is distinguished by its tighter electrical tolerances. While the JQ and SQ variants allow up to ±1/2 LSB linearity error, the KQ version is laser-trimmed to ±1/4 LSB, targeting applications requiring higher precision without sacrificing speed.
The AD568JQ serves as a lower-cost alternative with identical pinouts but looser accuracy specifications (±1/2 LSB linearity). The AD568SQ provides extended temperature capability (-55 °C to +125 °C) but does not offer the improved linearity of the KQ grade.
The AD568KQ has a maximum linearity error of ±1/4 LSB at +25°C.
The AD568KQ offers tighter performance specifications, specifically ±1/4 LSB linearity error and ±30 ppm/°C gain drift, whereas the AD568JQ allows ±1/2 LSB linearity and ±50 ppm/°C gain drift.
High-speed logic families such as Schottky TTL (STTL), High-Speed CMOS (HCMOS), or FAST TTL are recommended to minimize settling time and glitch impulse.