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The AD5694RBRUZ is a quad, 12-bit buffered voltage output digital-to-analog converter (DAC) from the nanoDAC+ family. It integrates a 2.5 V internal reference with a typical temperature coefficient of 2 ppm/°C and operates on a single 2.7 V to 5.5 V supply. The device features a 400 kHz I2C-compatible serial interface and supports user-selectable gain settings of 1 or 2 via the GAIN pin, allowing full-scale outputs of 2.5 V or 5 V respectively. Key performance metrics include a maximum total unadjusted error (TUE) of ±0.1% of FSR, a settling time of 7 µs, and low power consumption of 3.3 mW at 3 V.
Verify the specific suffix BRUZ corresponds to the 16-lead TSSOP package and reel/cut tape packaging options when sourcing. Confirm grade selection (A or B) as specifications such as INL and offset error vary between grades. Ensure the design accounts for the exposed pad requirement to ground in the TSSOP footprint.
Select the AD5694RBRUZ for applications requiring four independent 12-bit channels with integrated precision referencing. Choose Grade A for tighter linearity specifications (±0.12 LSB INL) or Grade B for cost-sensitive designs with slightly relaxed accuracy (±0.25 LSB INL). Verify that the required output swing matches the selected gain setting and supply voltage constraints.
This component belongs to the AD569xR family of nanoDAC+ devices, which also includes the 16-bit AD5696R and 14-bit AD5695R variants. All members share identical pinouts, interfaces, and core architectures, differing primarily in resolution and associated accuracy parameters. The 'R' designation indicates the inclusion of an internal reference, while 'BRUZ' specifies the TSSOP package and commercial/reel packaging.
Direct functional replacements within the same package and interface include the AD5695RBRUZ (14-bit) and AD5696RBRUZ (16-bit), provided higher resolution is acceptable. For external reference configurations, the AD5694BRUZ is available but lacks the onboard reference. Cross-family SPI-based alternatives like the AD5684R require significant schematic and firmware modifications due to interface differences.