AD7870JP

Overview

The AD7870JP is a complete monolithic 12-bit analog-to-digital converter featuring a 2 μs track-and-hold amplifier and an 8 μs successive approximation ADC. It operates from ±5 V power supplies with a typical power dissipation of 60 mW. The device accepts a single-ended analog input range of ±3 V and includes an on-chip 3 V buried Zener reference. Data output formats include parallel, byte, and serial interfaces with a data access time of 57 ns. Dynamic performance specifications include a signal-to-noise ratio of 72 dB at a 10 kHz input frequency. The component is housed in a 28-pin plastic leaded chip carrier package.

Feature Summary

• Integrated laser-trimmed internal clock oscillator eliminates the need for external timing components.
• Versatile digital interface supports parallel, byte, and serial data output formats for flexible microprocessor interfacing.
• On-chip temperature-compensated buried Zener reference provides stable conversion accuracy without external components.

Applications

• Data acquisition systems requiring fast throughput and high resolution
• Digital signal processing applications utilizing DSP architectures
• Industrial control systems with bipolar signal inputs

Procurement Notes

Verify the specific suffix JP indicates the commercial temperature range (0°C to +70°C) and PLCC-28 packaging configuration. Confirm that the ordering part number matches the exact pinout and electrical specifications required for the target application design. Ensure compatibility with existing board layouts before procurement.

Selection Notes

Select the AD7870JP when a ±3 V input voltage range is required for bipolar signal conditioning. Compare dynamic performance metrics such as SNR and THD against system noise requirements. Evaluate the interface mode options to determine if parallel or serial communication best suits the host processor's available resources and bus speed constraints.

Part Context

The AD7870 belongs to the AD7870/AD7875/AD7876 family of 12-bit sampling ADCs. While sharing identical architecture and performance characteristics, this specific variant is distinguished by its ±3 V analog input range capability. Other family members offer different input ranges, such as unipolar or wider bipolar spans, allowing designers to choose based on specific signal amplitude requirements.

Replacement Considerations

Direct functional replacements within the same family include the AD7875JNZ for unipolar applications and the AD7876 series for wider bipolar ranges. Verify pin compatibility and thermal specifications when substituting across package types or temperature grades.

FAQ

How is the internal clock configured?

The internal laser-trimmed clock is enabled by tying the CLK pin to VSS. An external TTL-compatible clock can be applied to this pin to override the internal oscillator if required.

What is the maximum recommended capacitance on the REF OUT pin?

The maximum recommended capacitance on the REF OUT pin for normal operation is 50 pF. External decoupling may require a series resistor to remove voltage spikes caused by internal operation.

How does the 12/8/CLK pin affect data output?

When the 12/8/CLK input is high (+5 V), the output format is restricted to 12-bit parallel data only. When low (0 V) or negative (-5 V), byte or serial data formats become available.