AD800-52BR

Overview

The AD800-52BR is a Phase-Locked Loop (PLL) Clock and Data Recovery integrated circuit manufactured by Analog Devices Inc. Designed for telecommunications applications, it supports the STS-1 standard data rate of 51.84 Mbps. The device accepts Non-Return to Zero (NRZ) differential ECL data inputs without requiring a preamble or external Voltage-Controlled Crystal Oscillator (VCXO). It provides differential recovered clock and retimed data outputs, also in ECL format. The component operates on a single supply voltage ranging from -4.5 V to -5.5 V and functions within an industrial temperature range of -40°C to +85°C. It is housed in a 20-pin Plastic SOIC package.

Feature Summary

• Supports 51.84 Mbps STS-1 data rates with no preamble requirement
• Integrated PLL architecture eliminates need for external VCXO
• Differential ECL compatible inputs and outputs
• Low jitter peaking of 0.08 dB at nominal damping factor

Applications

• STS-1 Clock and Data Recovery
• Telecommunications timing recovery systems
• NRZ data retiming circuits

Procurement Notes

Verify component authenticity through authorized Analog Devices distributors or direct manufacturer channels. Confirm lot traceability and RoHS compliance status prior to procurement. Check current availability as supply may be limited. Ensure storage conditions adhere to moisture sensitivity levels specified in the datasheet to prevent package damage during soldering.

Selection Notes

Select this model specifically for 51.84 Mbps STS-1 applications. For DS-3 rates, use the AD800-45 variant. For higher speeds like STM-1, consider the AD802 series. Ensure the design accommodates the required loop damping capacitor value to achieve the desired acquisition time and jitter transfer characteristics. Verify that the system power supply can provide the necessary current within the specified voltage range.

Part Context

This part belongs to the AD800/AD802 family of clock recovery ICs. The 'B' suffix indicates the -40°C to +85°C operating temperature grade. The 'R' suffix denotes the 20-pin Plastic SOIC package option. Other variants include the ceramic DIP package and different frequency targets such as 44.736 Mbps or 155.52 Mbps.

Replacement Considerations

Direct functional substitutes within the same family include the AD800-45BR for DS-3 rates. For higher bandwidth requirements, the AD802-155BR supports 155.52 Mbps. Package variations like the ceramic Cerdip (Q-20) are available but require pinout verification.