SEARCH
— IC芯片 | 连接器 | 传感器 | 被动器件 —
The AD8182AR-REEL is a dual 2-to-1 high-speed video multiplexer manufactured by Analog Devices Inc. It operates on a single +5 V supply and consumes 6.8 mA of quiescent current with both channels active. The device features a small-signal bandwidth exceeding 750 MHz and a slew rate of 750 V/µs. Key performance metrics include a channel switching time of 10 ns, a settling time to 0.1% of 14 ns, and an input offset voltage of 2 mV. It provides excellent video specifications such as 0.02% differential gain error and -93 dB OFF isolation at 5 MHz. The component is housed in a 14-lead SOIC package and supports an operating temperature range from -40°C to +85°C.
Verify the specific suffix REEL against the manufacturer's ordering guide to confirm the 13-inch reel packaging option. Ensure the design accommodates the 14-lead SOIC footprint and thermal requirements for the plastic package. Confirm that the logic levels for SELECT and ENABLE pins match the system interface voltages.
Select this component when dual independent 2-to-1 multiplexing is required within a single package. Compare the 750 MHz bandwidth against system frequency needs. Evaluate the 6.8 mA power consumption against available supply rails. Consider the AD8180 if only a single channel is needed to reduce board space.
This part belongs to the AD8180/AD8182 family of high-speed video multiplexers. The AD8182 specifically integrates two independent 2-to-1 switches, whereas the AD8180 contains a single channel. Both share identical electrical characteristics and are designed for professional video applications requiring fast settling and low distortion.
Public confirmed substitute part numbers are not identified in the provided documentation. Designers should consult the manufacturer's official documentation for any recommended upgrades or legacy replacements.
The device utilizes a switched open-loop buffer architecture with dedicated flatness circuits and decoder logic that translates TTL-compatible inputs to internal ECL levels, minimizing switching transients.
Driving the ENABLE pin HIGH forces both buffers into a disabled state, placing the output in a high-impedance state. This allows multiple devices to be connected in parallel without loading the output bus.
Yes, the device includes dedicated flatness circuits that keep peaking low (typically < 1 dB) even when driving high capacitive loads, though increasing load capacitance will reduce bandwidth.