SEARCH
— IC芯片 | 连接器 | 传感器 | 被动器件 —
The AD835AR is a four-quadrant voltage output analog multiplier fabricated on an advanced dielectrically isolated complementary bipolar process. It provides the linear product of X and Y inputs with a -3 dB bandwidth of 250 MHz and a small signal rise time of 1 ns. Full-scale (-1 V to +1 V) settling time to 0.1% is typically 20 ns. The device operates from ±4.5 V to ±5.5 V supplies, drawing 16 mA typical quiescent current. Inputs are high impedance (100 kΩ||2 pF), while the low impedance output drives loads as low as 25 Ω with swings up to ±2.5 V.
Verify the specific package variant against project requirements, as the AD835 family includes both PDIP and SOIC options. Confirm RoHS compliance status by checking for the 'Z' suffix in the part number, as standard versions may differ. Ensure supply voltage rails match the specified ±4.5 V to ±5.5 V range for optimal performance. Review absolute maximum ratings regarding internal power dissipation and soldering temperatures during assembly.
Select this component when high-speed analog signal processing is required, specifically for applications demanding 250 MHz bandwidth. Consider the low noise characteristics for sensitive signal paths where earlier multiplier products introduce excessive interference. Evaluate the need for a summing input (Z pin) to allow voltage gain adjustments or signal addition at the output stage without additional external circuitry complexity.
The AD835 series represents a monolithic solution for high-frequency analog multiplication tasks. It utilizes a translinear core supported by linearized voltage-to-current converters. The device distinguishes itself through state-of-the-art speed and low noise levels achieved via specialized band gap voltage references. It serves as a versatile building block for complex signal processing systems requiring precise linear product generation.
The AD835ANZ serves as a direct replacement offering identical electrical specifications but housed in an 8-lead PDIP package instead of the SOIC format.
The Z input allows for the addition of a signal at the output and enables the device to operate with voltage gains up to approximately ×10.
The low impedance output can drive loads as low as 25 Ω.