AD9083BBCZ

Overview

The AD9083BBCZ is a 16-channel, 125 MHz bandwidth, continuous time Σ-Δ (CTSD) analog-to-digital converter manufactured by Analog Devices Inc. It operates with sample rates up to 2 GSPS and supports flexible input ranges from 0.5 V p-p to 2 V p-p differential. The device features integrated digital processing blocks, including a CIC decimation filter and programmable DDC, alongside JESD204B Subclass 1 encoded outputs supporting up to 16 Gbps per lane. Power consumption is optimized at 90 mW per channel at 2.0 GSPS default settings. It utilizes 1.0 V and 1.8 V supply operation within an industrial temperature range of −40°C to +85°C.

Feature Summary

• Continuous-time Sigma-Delta architecture with integrated background nonlinearity correction and self-cancelling dither for high linearity.
• On-chip programmable single-pole antialiasing filter and termination resistor designed for low power and minimal external filtering requirements.
• Integrated digital signal processing tile containing a cascaded integrator comb filter, quadrature digital downconverter, and averaging filters.
• Configurable JESD204B interface supporting flexible lane configurations and deterministic latency via Subclass 1 compliance.

Applications

• Millimeter wave imaging systems
• Electronic beam forming and phased arrays
• Multichannel wideband receivers
• Electronic support measures

Procurement Notes

Verify the specific ordering suffix against official documentation to confirm package type and temperature grade. Confirm that the component meets RoHS standards and humidity sensitivity classifications required for your assembly process. Cross-reference the manufacturer's part number with authorized distributor catalogs to ensure authenticity and traceability before finalizing procurement orders.

Selection Notes

Select this component when designing multi-channel receiver architectures requiring high dynamic range and low power consumption. Ensure the system clock distribution supports the required 2 GSPS sampling rate and that the receiving logic device can handle the maximum serialized data rate of 16 Gbps per lane. Evaluate the available digital decimation options to match the desired output data rate and bandwidth constraints.

Part Context

The AD9083 belongs to Analog Devices' portfolio of high-performance data converters designed for demanding RF applications. It integrates sixteen independent ADC cores into a compact 100-ball CSP_BGA package. This integration significantly reduces printed circuit board space compared to discrete solutions while maintaining precise channel matching and synchronization capabilities across all channels.

Replacement Considerations

No public confirmed substitute part numbers are documented in the provided source material.