ChipApex | Global Electronic Components Supplier
AD9119BBCZ
Search Product
Search Post
— IC芯片 | 连接器 | 传感器 | 被动器件 —
Consult the customer manager about the wholesale price.
consultation hotline：86-132-6715-2157
email：[email protected]
Contact the product manager for consultation. One-stop consultation is available.
Do you want a lower wholesale price? Please send us your inquiry and we will reply immediately.
Product Detailed Parameters
- Description：IC DAC 11BIT A-OUT 160CSPBGA
- Series：-
- Mfr：Analog Devices Inc.
- Package：Tray
- Number of Bits：11
- Number of D/A Converters：1
- Settling Time：13ns (Typ)
- Output Type：Current - Unbuffered
- Differential Output：Yes
- Data Interface：LVDS - Parallel
- Reference Type：External, Internal
- Voltage - Supply, Analog：1.7V ~ 1.9V
- Voltage - Supply, Digital：1.7V ~ 1.9V
- INL/DNL (LSB)：0.2, 0.15
- Architecture：Quad-Switch
- Operating Temperature：-40°C ~ 85°C
- Package / Case：160-LFBGA, CSPBGA
- Supplier Device Package：160-CSPBGA (12x12)
- Mounting Type：Surface Mount
Download product information
Overview
The AD9119BBCZRL is an 11-bit, single-channel RF digital-to-analog converter (DAC) from Analog Devices. It supports a DAC update rate of up to 5.7 GSPS using dual-edge clocking in Mix-Mode or 2× interpolation. The device operates with data rates up to 2.85 GSPS and features a quad-switch NMOS core for direct RF synthesis. Key electrical parameters include a full-scale output current range of 9.1 mA to 34.9 mA, supply voltages of +1.8 V (VDDA/VDD) and −1.5 V (VSSA), and power dissipation of 1.0 W at 2.85 GSPS. It is housed in a 160-ball CSP_BGA package.
Feature Summary
- Quad-switch architecture enabling 5.7 GSPS update rate via dual-edge clocking
- Dual-port source synchronous LVDS interface with parity bit for data integrity
- On-chip delay locked loops (DLLs) for timing optimization between clock domains
- Bypassable 2× interpolation filters to simplify post-reconstruction filtering
Applications
- Broadband communications systems
- CMTS/VOD infrastructure
- Wireless infrastructure (W-CDMA, LTE)
- Radar and jammer systems
Procurement Notes
Verify the suffix ZRL indicates reel packaging when sourcing. Confirm RoHS compliance status through official manufacturer documentation. Ensure the specific revision (Rev. B datasheet) matches design requirements for AC specifications and register maps.
Selection Notes
Select this component for applications requiring high dynamic range up to 4.2 GHz in Mix-Mode. Compare against AD9129 if 14-bit resolution is required instead of 11-bit. Ensure host FPGA/ASIC supports dual-port LVDS or DHSTL interfaces for data input.
Part Context
The AD9119 belongs to the AD9119/AD9129 family of high-performance RF DACs. It shares the same core architecture and pinout as the 14-bit AD9129, differing primarily in resolution. Evaluation boards such as AD9119-MIX-EBZ are available for testing Mix-Mode operation.
Replacement Considerations
The AD9129BBCZRL is a compatible alternative within the same family offering 14-bit resolution. Other higher-speed alternatives like the AD9161 exist but differ in architecture and interface requirements.
