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Product Detailed Parameters
- Description:IC ADC 11BIT PIPELINED 56LFCSP
- Series:-
- Mfr:Analog Devices Inc.
- Package:Tray
- Number of Bits:11
- Sampling Rate (Per Second):200M
- Number of Inputs:1
- Input Type:Differential, Single Ended
- Data Interface:LVDS - Parallel
- Configuration:S/H-ADC
- Ratio - S/H:ADC:1:01
- Number of A/D Converters:1
- Architecture:Pipelined
- Reference Type:Internal
- Voltage - Supply, Analog:1.7V ~ 1.9V
- Voltage - Supply, Digital:1.7V ~ 1.9V
- Features:-
- Operating Temperature:-40°C ~ 85°C
- Package / Case:56-VFQFN Exposed Pad, CSP
- Supplier Device Package:56-LFCSP-VQ (8x8)
- Mounting Type:Surface Mount
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Overview
The AD9230BCPZ-210 is a 12-bit monolithic sampling analog-to-digital converter (ADC) from Analog Devices, operating at a maximum conversion rate of 210 MSPS. It features a 700 MHz full-power analog bandwidth and supports differential or single-ended inputs with a programmable voltage range of 1.0 V to 1.5 V. The device utilizes LVDS outputs compliant with ANSI-644 levels and operates on a single 1.8 V supply for both analog and digital sections. Key specifications include an SNR of 64.5 dBFS at 70 MHz input frequency and power dissipation of 434 mW in SDR mode.
Feature Summary
- Integrated track-and-hold circuit and internal voltage reference eliminate the need for external decoupling components.
- Supports selectable output data formats including offset binary, two's complement, and Gray code via serial port configuration.
- Includes a clock duty cycle stabilizer and integrated data capture clock output for precise timing alignment.
Applications
- Wireless and wired broadband communications systems
- Cable reverse path communications infrastructure
- Communications test equipment and signal analysis
- Radar and satellite subsystems
- Power amplifier linearization
Procurement Notes
Verify the specific speed grade suffix matches the required sample rate, as the AD9230 family includes 170, 210, and 250 MSPS variants. Confirm package integrity for the 56-lead LFCSP, ensuring the exposed paddle is intact for proper thermal and electrical grounding. Check RoHS compliance status and manufacturing date codes against project requirements before finalizing orders.
Selection Notes
Select this component when a 12-bit resolution and 210 MSPS throughput are required for wideband applications. Ensure the system can provide a stable 1.8 V supply and differential clock signals. Consider the LVDS interface compatibility with downstream FPGAs or ASICs. Evaluate power constraints, as the device consumes approximately 434 mW in standard operation.
Part Context
This part belongs to the AD9230 family of high-speed ADCs, which also includes the AD9230-170 and AD9230-250 variants differing primarily in maximum sampling rates. The AD9230 series is designed for ease of use with on-chip references and buffers. It shares pinouts with the 10-bit AD9211, facilitating potential design upgrades within the same footprint.
Replacement Considerations
The AD9230-170 and AD9230-250 are pin-compatible alternatives within the same family. Verify that the alternative speed grade meets the minimum or maximum sampling requirements of the application without compromising dynamic performance metrics like SNR or SFDR.
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