AD9273BSVZ-25

Overview

The AD9273BSVZ-25 is an octal analog front-end integrated circuit from Analog Devices, combining a low noise preamplifier (LNA), variable gain amplifier (VGA), antialiasing filter (AAF), and 12-bit analog-to-digital converter (ADC) in a single package. It features eight independent channels operating at sampling rates up to 25 MSPS. Key electrical specifications include an input-referred noise voltage of 1.26 nV/√Hz at 21.3 dB LNA gain, a signal-to-noise ratio (SNR) of 65.5 dB at 5 MHz input frequency, and a total power dissipation of 940 mW. The device utilizes serial LVDS outputs and supports SPI configuration.

Feature Summary

• Integrated Octal Channel: Combines LNA, VGA, AAF, and 12-bit ADC for space-efficient designs.
• Low Noise Performance: Input-referred noise voltage of 1.26 nV/√Hz with programmable LNA gains of 15.6 dB, 17.9 dB, or 21.3 dB.
• Flexible Gain Control: Variable gain amplifier offers a 42 dB attenuation range with linear-in-dB control via the GAIN+ pin.
• Programmable Filtering: Includes a second-order low-pass antialiasing filter adjustable from 8 MHz to 18 MHz.

Applications

• Medical imaging and ultrasound systems
• Automotive radar applications

Procurement Notes

Verify component authenticity through authorized distributors or direct manufacturer channels. Confirm RoHS compliance status and check for specific ordering suffixes that may indicate package variations or temperature ranges. Ensure supply chain documentation matches the AD9273BSVZ-25 designation.

Selection Notes

Select the AD9273BSVZ-25 variant specifically for 25 MSPS operation speeds. Consider the 100-lead TQFP package for surface mount assembly. Evaluate power consumption requirements, as full-channel mode dissipates approximately 940 mW. Ensure system clock inputs support CMOS, LVDS, or LVPECL logic levels for optimal performance.

Part Context

This component belongs to the AD9273 family of octal LNAs/VGAs/AAFs/ADCs. Other variants in the series include speed grades optimized for 40 MSPS and 50 MSPS operations. The device is fabricated using an advanced CMOS process and is designed for high integration in compact form factors.

Replacement Considerations

Direct replacements within the same family include the AD9273BSVZ-40 and AD9273BSVZ-50, which offer higher sampling rates but require verification of timing constraints and power budgets.

FAQ

What is the maximum sampling rate for the AD9273BSVZ-25?

The AD9273BSVZ-25 is specified for a maximum sampling rate of 25 MSPS.

How is the gain controlled in this device?

Gain is controlled via the GAIN+ pin, which allows for a 42 dB range with linear-in-dB characteristics, or through the SPI interface for digital programming.

What type of digital output interface does the ADC use?

The ADC uses a serial LVDS interface compliant with ANSI-644 standards, providing data and frame clock outputs.