AD9573ARUZ

Overview

The AD9573ARUZ is a fully integrated PCI Express clock generator featuring an on-chip PLL core optimized for PCIe applications. It accepts a 25 MHz external crystal input to generate two preset output frequencies: 100 MHz via LVDS and 33.33 MHz via LVCMOS. The device operates from a single 3.3 V supply within a -40°C to +85°C temperature range. Key electrical parameters include a typical RMS jitter of 0.54 ps (12 kHz to 20 MHz offset) and power dissipation of approximately 0.235 W. It utilizes a 16-lead TSSOP package measuring 4.4 mm × 5.0 mm.

Feature Summary

• Integrated PLL core with preprogrammed divide ratios for 100 MHz and 33.33 MHz outputs
• Low phase noise performance with -150 dBc/Hz at 10 MHz offset for the 100 MHz output
• Dual output formats: Differential LVDS (100 MHz) and Single-ended LVCMOS (33.33 MHz)
• No external loop filter components required, reducing board space and design time

Applications

• PCI Express (PCIe) clock generation
• CPU clocking solutions
• Line cards, switches, and routers
• Low jitter, low phase noise clock generation systems

Procurement Notes

Verify the specific ordering suffix against the manufacturer's current data sheet to confirm package type and temperature grade. Ensure the procurement documentation matches the RU-16 16-lead TSSOP package specification. Confirm RoHS compliance status as indicated in the official ordering guide before finalizing acquisition.

Selection Notes

Select this component when a dedicated PCIe clock solution is required without external programming or complex loop filter design. It is suitable for designs needing simultaneous 100 MHz differential and 33.33 MHz single-ended clocks. Verify that the system can accommodate a 25 MHz parallel resonant crystal with specified ESR and load capacitance requirements.

Part Context

The AD9573 belongs to Analog Devices' portfolio of high-performance frequency synthesizers designed for demanding phase noise applications. It simplifies clock distribution by integrating the VCO, PFD, charge pump, and dividers into a single compact package, eliminating the need for discrete timing components typically required in integer-N PLL designs.

Replacement Considerations

Publicly confirmed substitute part numbers are not available in the provided source material. Consult the manufacturer's official documentation for updated replacement recommendations or pin-compatible alternatives.