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Product Detailed Parameters
- Description：IC ADC 14BIT PIPELINED 72LFCSP
- Series：-
- Mfr：Analog Devices Inc.
- Package：Tape & Reel (TR)
- Number of Bits：14
- Sampling Rate (Per Second)：500M
- Number of Inputs：4
- Input Type：Differential
- Data Interface：JESD204B
- Configuration：S/H-ADC
- Ratio - S/H:ADC：1:01
- Number of A/D Converters：4
- Architecture：Pipelined
- Reference Type：Internal
- Voltage - Supply, Analog：0.95V ~ 1V, 1.71V ~ 1.89V, 2.44V ~ 2.56V
- Voltage - Supply, Digital：0.95V ~ 1V
- Features：Simultaneous Sampling
- Operating Temperature：-40°C ~ 105°C
- Package / Case：72-VFQFN Exposed Pad, CSP
- Supplier Device Package：72-LFCSP-VQ (10x10)
- Mounting Type：Surface Mount
- Grade：-
- Qualification：-
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Overview
The AD9694BCPZRL7-500 is a quad, 14-bit, 500 MSPS analog-to-digital converter (ADC) from Analog Devices Inc. It features JESD204B coded serial digital outputs with lane rates up to 15 Gbps and operates on 0.975 V, 1.8 V, and 2.5 V DC supplies. The device has a total power dissipation of 1.66 W at 500 MSPS, with 415 mW per channel. Key performance metrics include an SFDR of 82 dBFS at 305 MHz (1.80 V p-p input range), an SNR of 66.8 dBFS, and a noise density of −151.5 dBFS/Hz. It includes an internal voltage reference, analog input buffer, and on-chip dithering.
Feature Summary
- Features four integrated wideband decimation filters and numerically controlled oscillator (NCO) blocks supporting multiband receivers.
- Includes programmable fast overrange detection for efficient automatic gain control implementation.
- Provides buffered inputs to ease filter design and implementation.
- Supports flexible differential input ranges from 1.44 V p-p to 2.16 V p-p.
Applications
- Diversity multiband, multimode digital receivers
- General-purpose software radios
- Ultrawideband satellite receivers
Procurement Notes
Verify the specific ordering suffix RL7 against official documentation to confirm reel packaging requirements. Ensure compatibility with system power supply rails and clock interface standards before procurement. Confirm availability through authorized distributors as supply status may vary.
Selection Notes
Select this component for applications requiring high linearity and low power consumption in a compact form factor. Consider the 1.4 GHz full power bandwidth for IF sampling needs. Evaluate the JESD204B lane configuration options against the receiving logic device's capabilities to optimize data throughput.
Part Context
This part belongs to the AD9694 series of 14-bit ADCs designed for wide bandwidth analog signal sampling. It utilizes a multistage, differential pipelined architecture with integrated output error correction logic. The device is optimized for small size and ease of use, featuring an on-chip sample-and-hold circuit and buffer.
Replacement Considerations
Public confirmed substitute part numbers are not available in the provided source material.
FAQ
What is the maximum lane rate supported by the AD9694?
The AD9694 supports JESD204B lane rates up to 15 Gbps.
Does the AD9694 include an internal voltage reference?
Yes, the device includes an internal voltage reference to ease design considerations.
What is the operating junction temperature range for the AD9694?
The AD9694 is specified over a junction temperature range of −40°C to +105°C.
