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The AD9842AJSTZ is a complete analog signal processor for CCD applications, featuring a single-channel architecture designed to sample and condition outputs of interlaced and progressive scan area CCD arrays. It operates from a single 3 V power supply with typical power consumption of 78 mW. The device includes an input clamp, correlated double sampler (CDS), Pixel Gain Amplifier (PxGA), digitally controlled variable gain amplifier (VGA), black level clamp, and a true 12-bit A/D converter. It supports a maximum clock rate of 20 MHz and utilizes a 3-wire serial digital interface for register programming.
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Select this model when a 12-bit resolution is required for CCD signal processing at 20 MSPS. Ensure the design accommodates the 48-lead LQFP package dimensions and thermal requirements. Verify that the system logic levels are compatible with the 3 V single supply operation and 3-wire serial interface specifications.
This component belongs to the AD9841A/AD9842A family of complete CCD signal processors. The AD9842A variant specifically distinguishes itself by providing a true 12-bit ADC resolution, whereas the AD9841A offers 10-bit resolution. Both share identical architectures, pinouts, and functional blocks for conditioning CCD signals.
The AD9841AJSTZ serves as a direct substitute if 10-bit resolution is sufficient for the application. No other cross-model replacements are documented in the provided source material.