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The AD9973BBCZRL is a dual-channel CCD signal processor featuring a Precision Timing core with 240 ps resolution at 65 MHz. It integrates two analog front ends, each containing a correlated double sampler (CDS), a black level clamp, and a variable gain amplifier (VGA) providing 6 dB to 42 dB gain. Each channel includes a 14-bit, 65 MSPS analog-to-digital converter (ADC). The device operates on a 1.8 V analog and digital core supply voltage and utilizes a reduced range LVDS interface for data outputs. It is housed in a 6 mm × 6 mm, 84-ball CSP_BGA package.
Verify the specific suffix BBCZRL against the manufacturer's current datasheet revision SpA to confirm packaging and availability status. Ensure compatibility with 1.8 V supply requirements and check for any recent product change notices regarding the 84-ball CSP_BGA package before finalizing procurement plans.
Select this component for applications requiring precise synchronization of dual CCD sensors. The integrated VGA and CDS simplify analog front-end design. Verify that the system supports the required 65 MHz pixel rate and that the 1.8 V logic levels are compatible with the host processor or FPGA interface.
This part belongs to Analog Devices' CCD signal processor family designed for professional imaging. It consolidates multiple discrete components into a single chip, reducing board space and complexity. The device is specifically engineered for high-performance video capture systems where timing accuracy and signal integrity are critical.
No public confirmed substitute part numbers are available in the provided documentation. Evaluate alternative dual-channel CCD processors based on pinout compatibility and functional equivalence if sourcing becomes unavailable.
The Precision Timing core provides a resolution of 240 ps at 65 MHz operation.
Yes, each channel includes a 10-bit variable gain amplifier with a range of 6 dB to 42 dB.
The device uses a reduced range LVDS interface for its dual-channel data outputs.