ADAU1461WBCPZ-RL

Overview

The ADAU1461WBCPZ-RL is a low-power stereo audio codec featuring an integrated SigmaDSP core with 28-bit/56-bit processing capability and 50 MIPS performance. It includes 24-bit stereo analog-to-digital converters (ADCs) and digital-to-analog converters (DACs) supporting sampling rates from 8 kHz to 96 kHz, achieving over 98 dB signal-to-noise ratio. The device operates on a single 3.3 V analog supply, consuming approximately 17 mW during recording and 18 mW during playback at 48 kHz. It provides six configurable analog input pins, flexible mixers, stereo digital microphone inputs, and multiple output drivers including differential line outputs, single-ended stereo outputs, and a mono headphone driver. Control is managed via I²C or SPI interfaces.

Feature Summary

• Integrates a fully programmable SigmaDSP core for real-time audio processing and equalization.
• Supports flexible analog input configurations with automatic level control and microphone bias.
• Features multiple high-power analog output drivers supporting capless and AC-coupled headphone applications.
• Includes software-controllable clickless mute and pop-and-click suppression mechanisms.

Applications

• Automotive head units
• Automotive amplifiers
• Navigation systems
• Rear-seat entertainment systems

Procurement Notes

Verify the specific ordering suffix against the manufacturer's current datasheet to confirm package type and reel specifications. Ensure compatibility with the required operating temperature range and automotive qualification standards before finalizing procurement orders.

Selection Notes

Select this component when a combined audio codec and DSP solution is required to minimize system complexity. Verify that the available analog input channels and output drivers meet the specific transducer requirements of the target application design.

Part Context

This part belongs to the Analog Devices SigmaDSP family of audio processors. It combines high-fidelity audio conversion with programmable digital signal processing in a single 32-lead LFCSP package designed for space-constrained embedded audio systems.

Replacement Considerations

Consult official documentation for direct pin-compatible alternatives within the same product family. Verify functional equivalence regarding DSP architecture and analog interface specifications before substitution.

FAQ

What is the maximum sampling rate supported by the ADC and DAC?

The device supports sampling rates ranging from 8 kHz to 96 kHz.

How is the digital core power supply generated?

The digital core supply is generated internally from an onboard regulator powered by the AVDD pin; no external digital supply voltage is required.

Can the analog inputs be configured for differential operation?

Yes, the six analog input pins are configurable for either single-ended or differential input modes.